A package circuit structure includes a metal board including a first surface and a second surface, a plurality of embedded components, an insulating layer, and two antenna circuit boards. At least one first groove is recessed from the first surface. At least one second groove is recessed from the second surface. The first groove and the second groove are spaced with each other along a first direction perpendicular to a thickness direction of the metal board. Each embedded component is mounted in the first groove or the second groove. The insulating layer covers the first surface and the second surface and fills the first groove and the second groove. The antenna circuit boards are respectively stacked on two opposite sides of the insulating layer. Each antenna circuit board includes at least one antenna and at least one ground wiring. The metal board is electrically connected to each ground wiring.

A substrate structure, a semiconductor package and a manufacturing method of semiconductor package are provided. The substrate structure comprises a conductive structure, an electrical component, a package body and a ring-shaped conductive structure. The conductive structure comprises a first conductive layer and a second conductive layer. The first conductive layer has a lower surface. The second conductive layer and the electrical component are formed on the lower surface of the first conductive layer. The package body encapsulates the conductive structure and the electrical component and has an upper surface. The ring-shaped conductive structure surrounds the conductive structure and the electrical component and is disposed at the edge of the upper surface of the package body to expose the conductive structure.

An insulated metal substrate (IMS) and a method for manufacturing the same are disclosed. The IMS includes an electrically conductive line pattern layer, an encapsulation layer, a first adhesive layer, a second adhesive layer, and a heat sink element. The encapsulation layer fills a gap between a plurality of electrically conductive lines of the electrically conductive line pattern layer. An upper surface of the encapsulation layer is flush with an upper surface of the electrically conductive line pattern layer. The first and second adhesive layer are disposed between the electrically conductive line pattern layer and the heat sink element. A bonding strength between the first adhesive layer and the second adhesive layer is greater than 80 kg/cm.sup.2.

A display unit according to an embodiment of the disclosure includes a substrate, a wiring line and a light-emission section that are provided on the substrate, an insulating layer covering the wiring line and the light-emission section, and provided on an entire surface of the substrate, and a sealing layer provided on an entire surface of the insulating layer, and including a resin material having an oxygen transmission rate higher than a water-vapor transmission rate.

Provided is a semiconductor device including: a first external electrode which includes a circular outer peripheral portion; a MOSFET chip; a control circuit chip which receives voltages of a drain electrode and a source electrode of the MOSFET and supplies a signal to a gate electrode to control the MOSFET on the basis of the voltage; a second external electrode which is disposed on an opposite side of the first external electrode with respect to the MOSFET chip and includes an external terminal on a center axis of the circular outer peripheral portion of the first external electrode; and an isolation substrate which isolates the control circuit chip from the external electrode. The first external electrode, the drain electrode and the source electrode of the MOSFET chip, and the second external electrode are disposed to be overlapped in a direction of the center axis. The drain electrode of the MOSFET chip and the first external electrode are connected. The source electrode of the MOSFET chip and the second external electrode are connected.

A busbar assembly of the present invention includes a plurality of busbars disposed in parallel in a common plane with a gap between adjacent busbars, and an insulative resin layer including a gap filling part and a first surface-side laminate part, the first surface-side laminate part having a plurality of first surface-side center openings that expose predetermined parts of first surfaces of the plurality of busbars respectively to form a plurality of exposure regions, the insulative resin layer being formed by an insulative resin material that is transparent in a half-cured state and nontransparent in a completely cured state.

A method of forming a power semiconductor module includes providing a substrate of planar sheet metal, forming channels in an upper surface of the substrate that partially extend through a thickness of the substrate and define a plurality of islands in the substrate, mounting a first semiconductor die on a first one of the islands, forming a molded body of encapsulant that covers the substrate, fills the channels, and encapsulates the semiconductor die, forming a hole in the molded body and a recess in the upper surface of the substrate beneath the hole, and arranging a press-fit connector in the hole and forming a mechanical and electrical connection between an interior end of the press-fit connector and the substrate.

An object is to provide technology that enables cost reduction or downsizing of semiconductor packages. The wiring element includes a second substrate, a plurality of first relay pads arranged on a surface of the second substrate opposite to the conductor substrate and connected to each of the control pads of the plurality of semiconductor elements by wires, a plurality of second relay pads arranged on the surface of the second substrate opposite to the conductor substrate, the number thereof being equal to or lower than the number of the plurality of first relay pads, and a plurality of wiring portions arranged on the surfaceof the second substrate opposite to the conductor substrate and selectively connecting the plurality of first relay pads and the plurality of second relay pads.

According to one or more embodiments, a semiconductor device includes a support having a recess. A plurality of semiconductor chips are stacked on each other in the recess. A plurality of columnar electrodes in the recess extend from the semiconductor chips toward an opening of the support. A wiring layer is disposed over the opening. The recess is filled with an insulating material to cover the semiconductor chips and the columnar electrodes.

The present disclosure relates to components, such as base bodies, for feed-through elements including a metallic base body, at least one through-opening for receiving a functional element in a fixing material, such as an electrically insulating fixing material, and at least one conductor, which is connected electrically conductively to the base body by a soldered connection. The soldered connection includes a metallic solder material that covers a surface region of the base body and thus forms a soldering region on a surface of the base body. The base body has, at least in the soldering region, a microstructuring that includes at least depressions in the surface of the base body. The present disclosure similarly relates to methods for producing such base bodies and to applications thereof.