Patent classifications
H01L27/13
Low noise amplifier transistors with decreased noise figure and leakage in silicon-on-insulator technology
A metal oxide semiconductor field effect transistor preferably fabricated with a silicon-on-insulator process has a first semiconductor region and a second semiconductor region in a spaced relationship thereto A body structure is defined by a channel segment between the first semiconductor region and the second semiconductor region, and a first extension segment structurally contiguous with the channel segment. A shallow trench isolation structure surrounds the first semiconductor region, the second semiconductor region, and the body structure, with a first extension interface being defined between the shallow trench isolation structure and the first extension segment of the body structure to reduce leakage current flowing from the second semiconductor region to the first semiconductor region through a parasitic path of the body structure.
Low noise amplifier transistors with decreased noise figure and leakage in silicon-on-insulator technology
A metal oxide semiconductor field effect transistor preferably fabricated with a silicon-on-insulator process has a first semiconductor region and a second semiconductor region in a spaced relationship thereto A body structure is defined by a channel segment between the first semiconductor region and the second semiconductor region, and a first extension segment structurally contiguous with the channel segment. A shallow trench isolation structure surrounds the first semiconductor region, the second semiconductor region, and the body structure, with a first extension interface being defined between the shallow trench isolation structure and the first extension segment of the body structure to reduce leakage current flowing from the second semiconductor region to the first semiconductor region through a parasitic path of the body structure.
Method for configuring reconfigurable physical unclonable function based on device with spin-orbit torque effect
A method for configuring a reconfigurable physical unclonable function (PUF) based on a device with spin-orbit torque (SOT) effect is provided. The disclosure uses SOT or magnetic field to change the magnetic moment. After the current or magnetic field is removed, the magnetic moment returns to the easy axis direction. Under the effect of thermal fluctuation, the magnetic moment is randomly oriented in the easy axis direction. The non-volatile devices are formed into an array, the magnetic moments of all non-volatile devices are randomly distributed after a write operation. The read state can be used as a random code to implement the reconfigurable PUF. The PUF has a simple structure and guarantees security. The random code in the disclosure may be two-state or multi-state, which is related to the number of magnetic domains of the ferromagnetic layer. A large number of challenge response pairs form a strong PUF.
Method for configuring reconfigurable physical unclonable function based on device with spin-orbit torque effect
A method for configuring a reconfigurable physical unclonable function (PUF) based on a device with spin-orbit torque (SOT) effect is provided. The disclosure uses SOT or magnetic field to change the magnetic moment. After the current or magnetic field is removed, the magnetic moment returns to the easy axis direction. Under the effect of thermal fluctuation, the magnetic moment is randomly oriented in the easy axis direction. The non-volatile devices are formed into an array, the magnetic moments of all non-volatile devices are randomly distributed after a write operation. The read state can be used as a random code to implement the reconfigurable PUF. The PUF has a simple structure and guarantees security. The random code in the disclosure may be two-state or multi-state, which is related to the number of magnetic domains of the ferromagnetic layer. A large number of challenge response pairs form a strong PUF.
Circuit substrate
Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.
Circuit substrate
Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The present disclosure relates to a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor; and a capacitor having a first conductive layer and a second conductive layer and disposed on a second region of the second nitride semiconductor layer. Wherein the first conductive layer of the capacitor and the first source electrode have a first material, and the second conductive layer of the capacitor and the first field plate have a second material.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The present disclosure relates to a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor; and a capacitor having a first conductive layer and a second conductive layer and disposed on a second region of the second nitride semiconductor layer. Wherein the first conductive layer of the capacitor and the first source electrode have a first material, and the second conductive layer of the capacitor and the first field plate have a second material.
Power storage element, manufacturing method thereof, and power storage device
Disclosed is a power storage element including a positive electrode current collector layer and a negative electrode current collector layer which are arranged on the same plane and can be formed through a simple process. The power storage element further includes a positive electrode active material layer on the positive electrode current collector layer; a negative electrode active material layer on the negative electrode current collector layer; and a solid electrolyte layer in contact with at least the positive electrode active material layer and the negative electrode active material layer. The positive electrode active material layer and the negative electrode active material layer are formed by oxidation treatment.
Power storage element, manufacturing method thereof, and power storage device
Disclosed is a power storage element including a positive electrode current collector layer and a negative electrode current collector layer which are arranged on the same plane and can be formed through a simple process. The power storage element further includes a positive electrode active material layer on the positive electrode current collector layer; a negative electrode active material layer on the negative electrode current collector layer; and a solid electrolyte layer in contact with at least the positive electrode active material layer and the negative electrode active material layer. The positive electrode active material layer and the negative electrode active material layer are formed by oxidation treatment.