Circuitries for controlling a power consuming device are disclosed. Methods for operating the circuitries and manufacturing the circuitries are also disclosed. In some embodiments, the circuit comprises a first thin-film transistor (TFT), a second TFT, and a storage capacitor. The first TFT is configured to output a current to a power consuming device. The second TFT is configured to provide a control voltage to the first TFT for controlling an amount of the current. The storage capacitor is configured to store the control voltage.

Circuitries for controlling a power consuming device are disclosed. Methods for operating the circuitries and manufacturing the circuitries are also disclosed. In some embodiments, the circuit comprises a first thin-film transistor (TFT), a second TFT, and a storage capacitor. The first TFT is configured to output a current to a power consuming device. The second TFT is configured to provide a control voltage to the first TFT for controlling an amount of the current. The storage capacitor is configured to store the control voltage.

A structure includes a semiconductor substrate, and a polycrystalline resistor region over the semiconductor substrate. The polycrystalline resistor region includes a semiconductor material in a polycrystalline morphology. A dopant-including polycrystalline region is between the polycrystalline resistor region and the semiconductor substrate.

An electronic device including a driving circuit substrate, a plurality of light emitting units, and a first passivation layer is provided. The driving circuit substrate includes a plurality of active elements. The light emitting units are disposed on the driving circuit substrate and electrically connected to the driving circuit substrate, and each of the plurality of light emitting units is five surfaces light emitting type. The first passivation layer covers the light emitting units and the driving circuit substrate for protecting the light emitting units. One of the active elements provides a current to a corresponding one of the light emitting units, such that lighting efficiency of the corresponding one of the light emitting units is ranged from 70% to 100%. The current includes a plurality of pulse currents spaced apart from each other, and time widths of the pulse currents are the same.

A method for manufacturing a microelectronic device from a semiconductor-on-insulator substrate, the device having active components formed in active areas of the substrate separated by isolation trenches and which are delimited by first sidewalls, the isolation trenches being filled, at least partially, with a first dielectric material, includes a step of chemically attacking a passive section of the first bottom of the isolation trenches configured to generate, at said section, a roughness quadratic mean comprised between 2 nm and 6 nm. The method also includes a step of forming a passive component covering the first dielectric material and directly above the passive section.

A method for manufacturing a microelectronic device from a semiconductor-on-insulator substrate, the device having active components formed in active areas of the substrate separated by isolation trenches and which are delimited by first sidewalls, the isolation trenches being filled, at least partially, with a first dielectric material, includes a step of chemically attacking a passive section of the first bottom of the isolation trenches configured to generate, at said section, a roughness quadratic mean comprised between 2 nm and 6 nm. The method also includes a step of forming a passive component covering the first dielectric material and directly above the passive section.

A method for fabricating a semiconductor device includes the steps of forming a metal-oxide semiconductor (MOS) transistor on a substrate, forming an interlayer dielectric (ILD) layer on the MOS transistor, forming a ferroelectric field effect transistor (FeFET) on the ILD layer, and forming a ferroelectric random access memory (FeRAM) on the ILD layer. The formation of the FeFET further includes first forming a semiconductor layer on the ILD layer, forming a gate structure on the semiconductor layer, and then forming a source/drain region adjacent to the gate structure.

A method for fabricating a semiconductor device includes the steps of forming a metal-oxide semiconductor (MOS) transistor on a substrate, forming an interlayer dielectric (ILD) layer on the MOS transistor, forming a ferroelectric field effect transistor (FeFET) on the ILD layer, and forming a ferroelectric random access memory (FeRAM) on the ILD layer. The formation of the FeFET further includes first forming a semiconductor layer on the ILD layer, forming a gate structure on the semiconductor layer, and then forming a source/drain region adjacent to the gate structure.

Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode, a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.

Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode, a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.