A display device includes: a window including a front area and a side area bent from the front area, the side area having a first curvature; and a display panel including a first display area facing the front area of the window and a second display area facing the side area of the window, the first display area including first, second, and third light emission areas, the second display area including the first, second, and third light emission areas. The second display area comprises an edge display area and a corner display area disposed at an end of the edge display area, and the first light emission area, the second light emission area, and the third light emission area of the corner display area are disposed in a stair shape along a curved edge of the corner display area.

A method for manufacturing a tellurium-based semiconductor device comprises the steps of: preparing a substrate; depositing, on the substrate, a tellurium-based semiconductor material including tellurium and a tellurium oxide so as to form a tellurium-based semiconductor layer; and forming a passivation layer on the tellurium-based semiconductor layer. According to the manufacturing method, heat treatment at a high temperature or cryogenic conditions are not required, and thus, it is possible to manufacture a semiconductor device through a practical process. In addition, since the crystallinity of the tellurium-based semiconductor layer is improved during the manufacturing process, it is possible to provide a p-type semiconductor device having excellent electrical characteristics such as electric field mobility and a current blink ratio.

A method for manufacturing a tellurium-based semiconductor device comprises the steps of: preparing a substrate; depositing, on the substrate, a tellurium-based semiconductor material including tellurium and a tellurium oxide so as to form a tellurium-based semiconductor layer; and forming a passivation layer on the tellurium-based semiconductor layer. According to the manufacturing method, heat treatment at a high temperature or cryogenic conditions are not required, and thus, it is possible to manufacture a semiconductor device through a practical process. In addition, since the crystallinity of the tellurium-based semiconductor layer is improved during the manufacturing process, it is possible to provide a p-type semiconductor device having excellent electrical characteristics such as electric field mobility and a current blink ratio.

Tellurium oxide and a thin film transistor comprising the same as a channel layer are provided. The tellurium oxide is a metal oxide including tellurium, wherein a portion of the tellurium is in a Te.sup.0 state having a zero oxidation number, and another portion of the tellurium is in a Te.sup.4+ ' state having a tetravalent oxidation number.

Tellurium oxide and a thin film transistor comprising the same as a channel layer are provided. The tellurium oxide is a metal oxide including tellurium, wherein a portion of the tellurium is in a Te.sup.0 state having a zero oxidation number, and another portion of the tellurium is in a Te.sup.4+ ' state having a tetravalent oxidation number.

A semiconductor device includes a substrate, a two-dimensional material layer on the substrate, the two-dimensional material layer extending in a first direction, a gate structure extending in a second direction intersecting the first direction, the gate structure on the two-dimensional material layer, and a source/drain contact on the substrate. The source/drain contact surrounds each opposing end of the two-dimensional material layer, the source/drain contact includes a first portion in contact with each opposing end of the two-dimensional material layer, the source/drain contact includes a second portion on the first portion, and the second portion has a larger aspect ratio than an aspect ratio of the first portion.

A semiconductor device includes a substrate, a two-dimensional material layer on the substrate, the two-dimensional material layer extending in a first direction, a gate structure extending in a second direction intersecting the first direction, the gate structure on the two-dimensional material layer, and a source/drain contact on the substrate. The source/drain contact surrounds each opposing end of the two-dimensional material layer, the source/drain contact includes a first portion in contact with each opposing end of the two-dimensional material layer, the source/drain contact includes a second portion on the first portion, and the second portion has a larger aspect ratio than an aspect ratio of the first portion.

Discussed is a display device comprising a substrate; a plurality of cells provided with a partition wall protruding on the substrate, and sequentially arranged along one direction; a plurality of semiconductor light-emitting elements respectively accommodated in the plurality of cells; and a first electrode provided with a plurality of electrode lines arranged on a bottom of the plurality of cells, and electrically connected to the plurality of semiconductor light-emitting elements, wherein the bottom of the plurality of cells comprise a first region covered by the plurality of electrode lines, and a second region formed between the plurality of electrode lines.

An exemplary embodiment of the present invention provides a display device including a first display area having a plurality of first pixel regions and a second display area having both a plurality of second pixel regions and a plurality of light transmissive regions. The second display area includes a plurality of scan lines. The second pixel region includes a plurality of pixel electrodes and a voltage line disposed on a same layer as the pixel electrodes. The voltage line overlaps the scan line to be parallel therewith in the light transmissive region.

Pixelated-LED chips including a plurality of independently electrically accessible active layer portions supported by a plurality of discontinuous substrate portions to form a plurality of pixels, with underfill material of varying composition provided between sidewalls of adjacent pixels. Underfill materials having different reflection, scattering, absorption, filtering, etch-resistance, and/or light refraction properties may be provided in multiple layers. A method for fabricating a pixelated-LED chip includes defining streets through an active layer and portions of a substrate to form active layer portions, thinning an entire upper portion of a substrate to create openings into the streets and form discontinuous substrate portions bounding the streets, and supplying underfill material through the openings into the streets.