A semiconductor device according to an embodiment includes a SiC semiconductor layer, a gate electrode, a gate insulating film provided between the SiC semiconductor layer and the gate electrode, and a region that is provided between the SiC semiconductor layer and the gate insulating film and includes at least one element selected from the group consisting of antimony (Sb), scandium (Sc), yttrium (Y), lanthanum (La), and lanthanoids (Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu). The concentration of the at least one element is equal to or greater than 110.sup.19 cm.sup.3 and equal to or less than 2.410.sup.22 cm.sup.3.

A semiconductor device includes trench portions arrayed in a first direction on an upper surface side of a semiconductor substrate, a first conductivity type lower surface region provided in a part of a lower surface of the semiconductor substrate, a second conductivity type base region provided on the upper surface side, a first conductivity type first region disposed between the base region and the lower surface region, a first conductivity type upper surface region provided on an upper surface of the semiconductor substrate, and a second conductivity type bottom region disposed continuously in the first direction to be in contact with bottom portions of the trench portions. In a cross section along the first direction and perpendicular to the upper and lower surfaces and passing through the lower surface region, one end portion of the bottom region in the first direction locates directly above the lower surface region.

A semiconductor device is disclosed in which proton implantation is performed a plurality of times to form a plurality of n-type buffer layers in an n-type drift layer at different depths from a rear surface of a substrate. The depth of the n-type buffer layer, which is provided at the deepest position from the rear surface of the substrate, from the rear surface of the substrate is more than 15 m.

A Ga.sub.2O.sub.3-based semiconductor element includes an undoped -Ga.sub.2O.sub.3 single crystal film disposed on a surface of a -Ga.sub.2O.sub.3 substrate, a source electrode and a drain electrode disposed on a same side of the undoped -Ga.sub.2O.sub.3 single crystal film, a gate electrode disposed on the undoped -Ga.sub.2O.sub.3 single crystal film between the source electrode and the drain electrode, and a region formed in the undoped -Ga.sub.2O.sub.3 single crystal film under the source electrode and the drain electrode and including a controlled dopant concentration.

A method for forming a semiconductor structure by bonding a donor substrate to a carrier substrate is disclosed herein. The donor substrate may include a plurality of semiconductor layers epitaxially grown on top of one another in, and optionally above, a trench of the donor substrate. The carrier substrate may include a first semiconductor device thereon. The method may include removing at least part of the donor substrate in such a way as to expose a semiconductor layer grown on the bottom of the trench, removing at least part of the exposed semiconductor layer, thereby modifying the plurality of semiconductor layers, and forming a second semiconductor device from the modified plurality of semiconductor layers.

A method for growing nanocrystalline diamond (NCD) on Ga.sub.2O.sub.3 to provide thermal management in Ga.sub.2O.sub.3-based devices. A protective SiN.sub.x interlayer is deposited on the Ga.sub.2O.sub.3 before growth of the NCD layer to protect the Ga.sub.2O.sub.3 from damage caused during growth of the NCD layer. The presence of the NCD provides thermal management and enables improved performance of the Ga.sub.2O.sub.3-based device.

A HEMT device is provided. The HEMT device includes a substrate, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, and a drain. The first epitaxial layer is formed on the substrate. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is formed in the insulating layer and extends into the second epitaxial layer. The source and the drain are formed in the insulating layer and extend into the second epitaxial layer, wherein the source and the drain are located on both sides of the gate.

A HEMT device is provided. The HEMT device includes a substrate, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, and a drain. The first epitaxial layer is formed on the substrate. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is formed in the insulating layer and extends into the second epitaxial layer. The source and the drain are formed in the insulating layer and extend into the second epitaxial layer, wherein the source and the drain are located on both sides of the gate.

A HEMT device is provided. The HEMT device includes a substrate, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, and a drain. The first epitaxial layer is formed on the substrate. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is formed in the insulating layer and extends into the second epitaxial layer. The source and the drain are formed in the insulating layer and extend into the second epitaxial layer, wherein the source and the drain are located on both sides of the gate.

A heterostructure includes a substrate; an intermediate layer disposed on the substrate; and a group III-V layer having a first primary surface disposed on the intermediate layer and a dopant concentration that varies in a manner including a plurality of ramps with at least one of increasing dopant concentration and decreasing dopant concentration, along the growth direction from the first primary surface throughout the layer's thickness before terminating in a second primary surface.