A nanomaterial ribbon patterning method includes: forming a first nanomaterial layer having a first threshold strain on an upper surface of a substrate; forming a second nanomaterial layer on an upper surface of the first nanomaterial layer; forming a thin layer having a second threshold strain smaller than the first threshold strain on an upper surface of the second nanomaterial layer; generating plural cracks on the thin layer and the second nanomaterial layer by applying tensile force to the substrate; placing a mask on an upper surface of the thin layer; removing the mask and peeling off the sacrificial layer on the upper surface of the thin layer; and removing the sacrificial layer to form a nanomaterial ribbon pattern.

Provided are a method for manufacturing an electronic device capable of efficiently utilizing a material and a method for removing impurities using the same. The method for manufacturing an electronic device comprises the steps of: placing a transfer film on a plurality of functional layers which are positioned apart from each other on a source substrate; bringing a first transfer target into close contact with the lower surface of the transfer film by applying pressure to a portion of the transfer film that corresponds to the first transfer target from among the plurality of functional layers by using a probe; separating the transfer film from the source substrate in a state in which the first transfer target is in close contact with the lower surface; placing the transfer film on a target substrate in the state in which the first transfer target is in close contact with the lower surface; placing the first transfer target on the target substrate by applying pressure to a portion of the transfer film that corresponds to the first transfer target; and separating the transfer film from the target substrate in a state in which the first transfer target is positioned on the target surface.

A method for fabricating an electrically isolated diamond nanowire includes forming a diamond nanowire on a diamond substrate, depositing a dielectric or a polymer on the diamond nanowire and on the diamond substrate, planarizing the dielectric or the polymer, etching a portion of the planarized dielectric or polymer to expose a first portion of the diamond nanowire, depositing a metal layer to conformably cover the first portion of the diamond nanowire, and implanting ions into a second portion of the diamond nanowire between the first portion of the diamond nanowire and the diamond substrate or at an intersection of the diamond nanowire and the diamond substrate, wherein the ions are implanted at an oblique angle from a first side of the diamond nanowire.

A semiconductor device according to an embodiment includes a SiC layer, an electrode electrically connected to the SiC layer and an impurity region provided between the SiC layer and the electrode. The impurity region includes first position and second position, the first position having highest concentration of an impurity in the impurity region, the highest concentration being not lower than 110.sup.20 cm.sup.3 and not higher than 510.sup.22 cm.sup.3, the second position having concentration of the impurity one digit lower than the highest concentration, the first position being between the electrode and the second position, a distance between the first position and the second position being 50 nm or shorter.

A doped diamond semiconductor and method of production using a laser is disclosed herein. As disclosed, a dopant and/or a diamond or sapphire seed material may be added to a graphite based ablative layer positioned below a confinement layer, the ablative layer also being graphite based and positioned above a backing layer, to promote formation of diamond particles having desirable semiconductor properties via the action of a laser beam upon the ablative layer. Dopants may be incorporated into the process to activate the reaction sought to produce a material useful in production of a doped semiconductor or a doped conductor suitable for the purpose of modulating the electrical, thermal or quantum properties of the material produced. As disclosed, the diamond particles formed by either the machine or method of confined pulsed laser deposition disclosed may be arranged as semiconductors, electrical components, thermal components, quantum components and/or integrated circuits.

A method for fabricating an electrically isolated diamond nanowire includes forming a diamond nanowire on a diamond substrate, depositing a dielectric or a polymer on the diamond nanowire and on the diamond substrate, planarizing the dielectric or the polymer, etching a portion of the planarized dielectric or polymer to expose a first portion of the diamond nanowire, depositing a metal layer to conformably cover the first portion of the diamond nanowire, and implanting ions into a second portion of the diamond nanowire between the first portion of the diamond nanowire and the diamond substrate or at an intersection of the diamond nanowire and the diamond substrate, wherein the ions are implanted at an oblique angle from a first side of the diamond nanowire.

A semi-metal or other semiconductor material is applied to a portion of a fur, skin, or feather commodity. The material is applied in a liquid, aerosol, or adhesive formulation, such that the material is molecularly adhered to the fur, skin, or feather commodity. The material may also be applied by a laser burning or branding process. The material may be applied prior to a chemical treatment of the fur, skin, or feather commodity.

The present invention disclose an Electrostatic doping (ED)-based graphene nanoribbon (GNR) tunneling field-effect transistor (TFET) with tri-gate design. This device uses hydrogen-passivated GNR heterojunction as a carrier path way and functions as a power switch providing a switching speed of .sup.0.3 ps.sup.1 an I.sub.ON/I.sub.OFF ratio as high as 10.sup.14 with the on-state current in the order of 10.sup.3 A/m. This disclosed invention consists of two electrode, two electrode extensions, six metallic gate regions, and six dielectric regions.

Non-conductive substrates, especially the sidewalls of micro/nano holes thereof are chemically modified (i.e., chemically grafted) by reduced graphene oxide (rGO). The rGO possesses excellent electrical conductivity and therefore the modified substrates become conductive, so that it can be directly electroplated. These rGO-grafted holes can pass thermal shock reliability test after electroplating. The rGO grafting process possesses many advantages, such as a short process time, no complex agent (i.e., no chelator), no toxic agents (i.e., formaldehyde for electroless Cu deposition). It is employed in an aqueous solution instead of an organic solvent, and therefore is environmentally friendly and beneficial for industrial production.

Semiconductor devices including two-dimensional (2D) materials and methods of manufacturing the semiconductor devices are provided. A semiconductor device may include a semiconductor layer including layers of a 2D material, and an intercalation material between the layers of the 2D material. The semiconductor device may further include a first conductive layer on a first surface of the semiconductor layer and a second conductive layer on a second surface of the semiconductor layer that is opposite the first surface. A portion of the 2D material may have a first crystalline structure, and another portion of the 2D material may have a second crystalline structure that is different from the first crystalline structure. The 2D material may include a metal chalcogenide-based material.