H01L29/66053

SiC COMPOSITE SUBSTRATE AND SEMICONDUCTOR DEVICE

A SiC composite substrate includes a SiC single crystal layer and at least one biaxially oriented SiC layer. The at least one biaxially oriented SiC layer is disposed on the SiC single crystal. In the biaxially oriented SiC layer, the SiC is oriented in both a c-axis direction and an a-axis direction. The biaxially oriented SiC layer has pores and has a density of defect reaching the surface of 1.0×10.sup.1/cm.sup.2 or less.

3D SEMICONDUCTOR APPARATUS MANUFACTURED WITH A PLURALITY OF SUBSTRATES AND METHOD OF MANUFACTURE THEREOF
20210175358 · 2021-06-10 · ·

Aspects of the disclosure provide a method of forming a semiconductor apparatus including a first portion and a second portion. The first portion is formed on a first substrate and includes at least one first semiconductor device. The second portion is formed on a second substrate including a bulk substrate material and includes at least one second semiconductor device. A carrier substrate is attached to the second portion. The bulk substrate material is removed from the second substrate. The first portion and the second portion are bonded to form the semiconductor apparatus where the at least one second semiconductor device is stacked above the at least one first semiconductor device along a Z direction substantially perpendicular to a substrate plane of the first substrate. The at least one first semiconductor device and the at least one second semiconductor device are positioned between the carrier substrate and the first substrate.

Forming semiconductor devices in silicon carbide

A method includes providing a first layer of epitaxial silicon carbide supported by a silicon carbide substrate, providing a second layer of epitaxial silicon carbide on the first layer, forming a plurality of semiconductor devices in the second layer, and separating the substrate from the second layer at the first layer. The first layer includes a plurality of voids.

Method for processing semiconductor wafers using a grinding wheel
10974365 · 2021-04-13 · ·

A method for forming semiconductor devices includes: grinding a backside of a semiconductor wafer with a grinding wheel during a first time interval, wherein the grinding wheel is forward moved during the first time interval, wherein a plurality of semiconductor devices are formed on the semiconductor wafer; and polishing the backside of the semiconductor wafer with the grinding wheel in a second time interval, wherein the grinding wheel is backward moved during the second time interval.

Method for thinning solid body layers provided with components

The present invention relates to a method for separating at least one solid-body layer (4) from at least one solid body (1). Thereby, the method as claimed in the invention comprises the steps: creating a plurality of modifications (9) by means of laser beams within the interior space of the solid body (1) to form a detachment plane (8), producing a composite structure by arranging or producing layers and/or components (150) on or above an initially exposed surface (5) of the solid body (1), wherein the exposed surface (5) is an integral part of the solid-body layer (4) to be separated, introducing an external force into the solid body (1) for generating tensions within the solid body (1), wherein the external force is so strong that the tensions initialize a crack propagation along the detachment plane (8), wherein the modifications for forming the detachment plane (8) are created before producing the composite structure.

METHOD OF PRODUCING A SEMICONDUCTOR DEVICE HAVING A FERROELECTRIC GATE STACK
20230411460 · 2023-12-21 ·

A method of producing a semiconductor device includes forming a plurality of transistor cells in a SiC substrate and electrically connected in parallel to form a transistor having a specified operating temperature range. Forming each transistor cell includes forming a gate structure having a gate electrode, and a gate dielectric stack separating the gate electrode from the SiC substrate and including a ferroelectric insulator. The method further includes doping the ferroelectric insulator with a doping material such that the Curie temperature of the ferroelectric insulator is in a range above the specified operating temperature range of the transistor.

SiC epitaxial wafer and manufacturing method of the same

The object of the present invention is to enhance the device yield of SiC epitaxial wafers. The SiC epitaxial wafer includes a drift layer which is a SiC epitaxial layer. The drift layer has a film thickness of 18 m or more and 350 m or less and has arithmetic average roughness of 0.60 nm or more and 3.00 nm or less, and the impurity concentration thereof is 110.sup.14/cm.sup.3 or more and 510.sup.15/cm.sup.3 or less.

Gate insulating layer having a plurality of silicon oxide layer with varying thickness

A semiconductor device according to an embodiment includes a silicon carbide layer; a gate electrode; and a gate insulating layer which is provided between the silicon carbide layer and the gate electrode and includes a first silicon oxide layer and a second silicon oxide layer provided between the first silicon oxide layer and the gate electrode, the first silicon oxide layer having a first nitrogen concentration and a first thickness, the second silicon oxide layer having a second nitrogen concentration lower than the first nitrogen concentration and a second thickness. The second thickness between an end portion of the gate electrode and the silicon carbide layer is greater than the second thickness between a central portion of the gate electrode and the silicon carbide layer.

Manufacturing method of an element of an electronic device having improved reliability, and related element, electronic device and electronic apparatus

A manufacturing method of an anchorage element of a passivation layer, comprising: forming, in a semiconductor body made of SiC and at a distance from a top surface of the semiconductor body, a first implanted region having, along a first axis, a first maximum dimension; forming, in the semiconductor body, a second implanted region, which is superimposed to the first implanted region and has, along the first axis, a second maximum dimension smaller than the first maximum dimension; carrying out a process of thermal oxidation of the first implanted region and second implanted region to form an oxidized region; removing said oxidized region to form a cavity; and forming, on the top surface, the passivation layer protruding into the cavity to form said anchorage element fixing the passivation layer to the semiconductor body.

Method for Processing Semiconductor Wafers Using a Grinding Wheel
20200298369 · 2020-09-24 ·

A method for forming semiconductor devices includes: grinding a backside of a semiconductor wafer with a grinding wheel during a first time interval, wherein the grinding wheel is forward moved during the first time interval, wherein a plurality of semiconductor devices are formed on the semiconductor wafer; and polishing the backside of the semiconductor wafer with the grinding wheel in a second time interval, wherein the grinding wheel is backward moved during the second time interval.