Patent classifications
H01L31/072
METHOD OF FORMING ELECTRODES FOR ELECTRONIC DEVICE USING TWO DIMENSIONAL SEMICONDUCTOR AND ELECTRONIC DEVICE THEREOF
In case of forming electrodes for electronic device using a two-dimensional semiconductor, a two-dimensional semiconductor layer doped into n-type or p-type is formed on a substrate, a first area and a second area of the doped two-dimensional semiconductor layer is patterned into a predetermined pattern shape, and a first electrode and a second electrode are formed on the patterned first and second areas, respectively.
METHOD OF FORMING ELECTRODES FOR ELECTRONIC DEVICE USING TWO DIMENSIONAL SEMICONDUCTOR AND ELECTRONIC DEVICE THEREOF
In case of forming electrodes for electronic device using a two-dimensional semiconductor, a two-dimensional semiconductor layer doped into n-type or p-type is formed on a substrate, a first area and a second area of the doped two-dimensional semiconductor layer is patterned into a predetermined pattern shape, and a first electrode and a second electrode are formed on the patterned first and second areas, respectively.
Two-terminal electronic devices and their methods of fabrication
Two-terminal electronic devices, such as photodetectors, photovoltaic devices and electroluminescent devices, are provided. The devices include a first electrode residing on a substrate, wherein the first electrode comprises a layer of metal; an I-layer comprising an inorganic insulating or broad band semiconducting material residing on top of the first electrode, and aligned with the first electrode, wherein the inorganic insulating or broad band semiconducting material is a compound of the metal of the first electrode; a semiconductor layer, preferably comprising a p-type semiconductor, residing over the I-layer; and a second electrode residing over the semiconductor layer, the electrode comprising a layer of a conductive material. The band gap of the material of the semiconductor layer, is preferably smaller than the band gap of the I-layer material. The band gap of the material of the I-layer is preferably greater than 2.5 eV.
Two-terminal electronic devices and their methods of fabrication
Two-terminal electronic devices, such as photodetectors, photovoltaic devices and electroluminescent devices, are provided. The devices include a first electrode residing on a substrate, wherein the first electrode comprises a layer of metal; an I-layer comprising an inorganic insulating or broad band semiconducting material residing on top of the first electrode, and aligned with the first electrode, wherein the inorganic insulating or broad band semiconducting material is a compound of the metal of the first electrode; a semiconductor layer, preferably comprising a p-type semiconductor, residing over the I-layer; and a second electrode residing over the semiconductor layer, the electrode comprising a layer of a conductive material. The band gap of the material of the semiconductor layer, is preferably smaller than the band gap of the I-layer material. The band gap of the material of the I-layer is preferably greater than 2.5 eV.
Homogeneous precursor formation method and device thereof
A direct solution method based on a versatile amine-thiol solvent mixture which dissolves elemental metals, metal salts, organometallic complexes, metal chalcogenides, and metal oxides is described. The metal containing and metal chalcogenide precursors can be prepared by dissolving single or multiple metal sources, chalcogens, and/or metal chalcogenide compounds separately, simultaneously, or stepwise. Multinary metal chalcogenides containing at least one of copper, zinc, tin, indium, gallium, cadmium, germanium, and lead, with at least one of sulfur, selenium, or both are obtained from the above-mentioned metal chalcogenide precursors in the form of thin films, nanoparticles, inks, etc. Furthermore, infiltration of metal containing compounds into a porous structure can be achieved using the amine-thiol based precursors. In addition, due to the appreciable solubility of metal sources, metal chalcogenides, and metal oxides in the mixture of amine(s) and thiol(s), this solvent mixture can be used to remove these materials from a system.
Homogeneous precursor formation method and device thereof
A direct solution method based on a versatile amine-thiol solvent mixture which dissolves elemental metals, metal salts, organometallic complexes, metal chalcogenides, and metal oxides is described. The metal containing and metal chalcogenide precursors can be prepared by dissolving single or multiple metal sources, chalcogens, and/or metal chalcogenide compounds separately, simultaneously, or stepwise. Multinary metal chalcogenides containing at least one of copper, zinc, tin, indium, gallium, cadmium, germanium, and lead, with at least one of sulfur, selenium, or both are obtained from the above-mentioned metal chalcogenide precursors in the form of thin films, nanoparticles, inks, etc. Furthermore, infiltration of metal containing compounds into a porous structure can be achieved using the amine-thiol based precursors. In addition, due to the appreciable solubility of metal sources, metal chalcogenides, and metal oxides in the mixture of amine(s) and thiol(s), this solvent mixture can be used to remove these materials from a system.
LASER IRRADIATION ALUMINUM DOPING FOR MONOCRYSTALLINE SILICON SUBSTRATES
Various laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. Laser ablation techniques are disclosed that leave the underlying silicon substantially undamaged. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, or other cleavage techniques such as ion implantation and heating, that are either planar or textured/three-dimensional. These techniques are highly suited to thin crystalline semiconductor, including thin crystalline silicon films.
OPTIMISED SOLAR CELL, SOLAR CELL MODULE AND METHOD OF MANUFACTURING THEREOF
The present invention concerns a bifacial solar cell (1) comprising a front side (10) and a back side (20), said front and back sides (10, 20) having a respective outer layer (34) made of transparent conductive oxide, on which is placed a respective metallization grid (11, 21), each metallization grid (11, 21) comprising first collectors (111, 211) running parallel to each other in a horizontal direction (x) of said solar cell (1) and second collectors (112, 212) crossing said first collectors (111, 211), each second collector (112, 212) comprising two vertical elements (112a, 112b, 212a, 212b) and at least one horizontal element (112c, 212c) every one or two first collectors (111) or 3 or 6 first collectors (211) connecting said two vertical elements (112a, 112b, 212a, 212b), said solar cell module being characterized in that said metallization grids (11, 21) furtherly comprise at least one respective front or back area (113, 213), said front or back area (113, 213) comprising said at least one horizontal element (112c, 212c) and a portion of the underlying outer layer (34) made of transparent conductive oxide, so that a cell connector can be attached to said solar cell (1) by means of an electrically conductive adhesive deposited on said front or back area (113, 213) without needing a physical barrier for said electrically conductive adhesive. The present invention also concerns a solar cell module and a method of manufacturing thereof.
OPTIMISED SOLAR CELL, SOLAR CELL MODULE AND METHOD OF MANUFACTURING THEREOF
The present invention concerns a bifacial solar cell (1) comprising a front side (10) and a back side (20), said front and back sides (10, 20) having a respective outer layer (34) made of transparent conductive oxide, on which is placed a respective metallization grid (11, 21), each metallization grid (11, 21) comprising first collectors (111, 211) running parallel to each other in a horizontal direction (x) of said solar cell (1) and second collectors (112, 212) crossing said first collectors (111, 211), each second collector (112, 212) comprising two vertical elements (112a, 112b, 212a, 212b) and at least one horizontal element (112c, 212c) every one or two first collectors (111) or 3 or 6 first collectors (211) connecting said two vertical elements (112a, 112b, 212a, 212b), said solar cell module being characterized in that said metallization grids (11, 21) furtherly comprise at least one respective front or back area (113, 213), said front or back area (113, 213) comprising said at least one horizontal element (112c, 212c) and a portion of the underlying outer layer (34) made of transparent conductive oxide, so that a cell connector can be attached to said solar cell (1) by means of an electrically conductive adhesive deposited on said front or back area (113, 213) without needing a physical barrier for said electrically conductive adhesive. The present invention also concerns a solar cell module and a method of manufacturing thereof.
PHOTOELECTRONIC DEVICE INCLUDING CHARGE BARRIER
A photoelectronic device includes a semiconductor substrate doped with a first type impurity, a second semiconductor layer doped with a second type impurity of an opposite type to the first type impurity, a transparent electrode formed on a second surface of the second semiconductor layer, the second surface being opposite a first surface on which the semiconductor substrate is formed, and a barrier layer disposed between the second semiconductor layer and the semiconductor substrate or between the second semiconductor layer and the transparent electrode. The second semiconductor layer has a band gap energy less than that of the semiconductor substrate, and the barrier layer includes a semiconductor material or an insulator having a band gap greater than that of the semiconductor substrate.