A rear contact heterojunction solar cell and a fabricating method. The solar cell comprises a silicon substrate having a passivating layer and an intrinsic amorphous silicon layer. At a back side of the intrinsic amorphous silicon layer, an emitter layer and a base layer are provided. Interposed between these emitter and base layers is a separation layer comprising an electrically insulating material. This separation layer as well as the base layer and emitter layer may be generated by vapor deposition. Due to such processing, adjacent regions of the emitter layer and the separating layer and adjacent regions of the base layer and the separating layer partially laterally overlap in overlapping areas in such a way that at least a part of the separating layer is located closer to the substrate than an overlapping portion of the respective one of the emitter layer and the base layer.

A rear contact heterojunction solar cell and a fabricating method. The solar cell comprises a silicon substrate having a passivating layer and an intrinsic amorphous silicon layer. At a back side of the intrinsic amorphous silicon layer, an emitter layer and a base layer are provided. Interposed between these emitter and base layers is a separation layer comprising an electrically insulating material. This separation layer as well as the base layer and emitter layer may be generated by vapor deposition. Due to such processing, adjacent regions of the emitter layer and the separating layer and adjacent regions of the base layer and the separating layer partially laterally overlap in overlapping areas in such a way that at least a part of the separating layer is located closer to the substrate than an overlapping portion of the respective one of the emitter layer and the base layer.

A photovoltaic device and method include forming a plurality of pillar structures in a substrate, forming a first electrode layer on the pillar structures and forming a continuous photovoltaic stack including an N-type layer, a P-type layer and an intrinsic layer on the first electrode. A second electrode layer is deposited over the photovoltaic stack such that gaps or fissures occur in the second electrode layer between the pillar structures. The second electrode layer is wet etched to open up the gaps or fissures and reduce the second electrode layer to form a three-dimensional electrode of substantially uniform thickness over the photovoltaic stack.

A photovoltaic device and method include forming a plurality of pillar structures in a substrate, forming a first electrode layer on the pillar structures and forming a continuous photovoltaic stack including an N-type layer, a P-type layer and an intrinsic layer on the first electrode. A second electrode layer is deposited over the photovoltaic stack such that gaps or fissures occur in the second electrode layer between the pillar structures. The second electrode layer is wet etched to open up the gaps or fissures and reduce the second electrode layer to form a three-dimensional electrode of substantially uniform thickness over the photovoltaic stack.

The present invention refers to a photovoltaic cell (1) comprising a heterojunction with a base layer (L4, L4′, L4″) made from an Aluminium-Ar-senic-basedalloy and an emitter layer (L3, L3′) made from an Indium-Phosphorous based alloy wherein the emitter layer (L3, L3′) has a thickness smaller than 100 nm and acts as a passivation layer to prevent oxidation of the base layer and reduces surface recombination (L4, L4′, L4″).

The present invention refers to a photovoltaic cell (1) comprising a heterojunction with a base layer (L4, L4′, L4″) made from an Aluminium-Ar-senic-basedalloy and an emitter layer (L3, L3′) made from an Indium-Phosphorous based alloy wherein the emitter layer (L3, L3′) has a thickness smaller than 100 nm and acts as a passivation layer to prevent oxidation of the base layer and reduces surface recombination (L4, L4′, L4″).

Disclosed is a quantum dot based solar cell device which includes a substrate, a light harvesting structure sandwiched between electrically conducing layers, with at least one electrically conducting layer being substantially transparent with the light harvesting structure being located on the substrate. The light harvesting structure includes a layer of semiconducting quantum dots, with this layer of semiconducting quantum dots including at least two distinct sets of semiconducting quantum dots which are homogenously mixed. One of the two distinct sets of semiconducting quantum dots has a first bandgap and the at least one other distinct set of semiconducting quantum dots has a second bandgap different from the first bandgap. Both sets of semiconducting quantum dots are passivated with any one or combination of halides and pseudo-halides. Upon illumination, the quantum dot solar cell device exhibits a photovoltage that is intermediate between a photovoltage that would generated separately if the solar cell device had only the first set of quantum dots and a photovoltage that would be generated separately if the solar cell device had only the second set of quantum dots.

An optoelectronic device comprises microwires or nanowires, each of which comprises an alternation of passivated portions and of active portions, the active portions being surrounded with an active layer, where the active layers do not extend on the passivated portions.

An optoelectronic device comprises microwires or nanowires, each of which comprises an alternation of passivated portions and of active portions, the active portions being surrounded with an active layer, where the active layers do not extend on the passivated portions.

Image sensor pixels having low full-well capacity and high sensitivity for applications such as DIS, qDIS, single/multi bit QIS. Some embodiments provide an image sensor pixel architecture, comprises a transfer gate, a floating diffusion region both formed on a first surface of a semiconductor substrate and a buried-well vertically pinned photodiode having a charge accumulation/storage region disposed substantially or entirely beneath the transfer gate. Image sensor may also comprise an array of pixels, wherein each pixel comprises: a vertical bipolar structure including an emitter, base, collector configured for storing photocarriers in the base; and a reset transistor coupled to the base, configured to be completely reset of all free carriers using the reset transistor. The emitter may be configured as a pinning layer to facilitate full depletion of the base. Such image sensor pixels may have a full well capacity less than that giving good signal-to-noise ratio (SNR).