An optoelectronic device is manufactured by an epitaxial growth, on each first layer of many first layers spaced apart from each other on a first support, wherein the first is made of a first semiconductor material, of a second layer made of a second semiconductor material. A further epitaxial growth is made on each second layer of a stack of semiconductor layers. Each stack includes a third layer made of a third semiconductor material in physical contact with the second layer. Each stack is then separated from the first layer by removing the second layer using an etching that is selective simultaneously over both the first and third semiconductor materials. Each stack is then transferred onto a second support. Each of the first and third semiconductor materials is one of a III-V compound or a II-VI compound.

A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.

In an embodiment an electronic semiconductor chip includes a growth substrate with a growth surface including a flat region having a plurality of three-dimensionally designed surface structures on the flat region, a nucleation layer composed of oxygen-containing AlN in direct contact with the growth surface at the flat region and the three-dimensionally designed surface structures and a nitride-based semiconductor layer sequence on the nucleation layer, wherein the semiconductor layer sequence overlays the three-dimensionally designed surface structures, and wherein the oxygen content in the nucleation layer is greater than 10.sup.19 cm.sup.−3.

A composition of matter comprising: a graphene layer carried directly on a sapphire, Si, SiC, Ga.sub.2O.sub.3 or group III-V semiconductor substrate; wherein a plurality of holes are present through said graphene layer; and wherein a plurality of nanowires or nanopyramids are grown from said substrate in said holes, said nanowires or nanopyramids comprising at least one semiconducting group III-V compound.

A solar cell includes a first layer having a first-layer lattice parameter, a second layer having a second-layer lattice parameter different from the first-layer lattice parameter, wherein the second layer includes a photoactive second-layer material; and a third layer having a third-layer lattice parameter different from the second-layer lattice parameter, wherein the third layer includes a photoactive third-layer material. A transparent buffer layer extends between and contacts the second layer and the third layer and has a buffer-layer lattice parameter that varies with increasing distance from the second layer toward the third layer, so as to lattice match to the second layer and to the third layer. There may be additional subcell layers and buffer layers in the solar cell.

The present invention discloses a two-dimensional AlN material and its preparation method and application, wherein the preparation method comprises the following steps: (1) selecting a substrate and its crystal orientation; (2) cleaning the surface of the substrate; (3) transferring a graphene layer to the substrate layer; (4) annealing the substrate; (5) using the MOCVD process to introduce H.sub.2 to open the graphene layer and passivate the surface of the substrate; and (6) using the MOCVD process to grow a two-dimensional AlN layer. The preparation method of the present invention has the advantages that the process is simple, time saving and efficient. Besides, the two-dimensional AlN material prepared by the present invention can be widely used in HEMT devices, deep ultraviolet detectors or deep ultraviolet LEDs, and other fields.

A multijunction solar cell including a metamorphic layer, and particularly the design and specification of the composition, lattice constant, and band gaps of various layers above the metamorphic layer in order to achieve reduction in “bowing” of the semiconductor wafer caused by the lattice mismatch of layers associated with the metamorphic layer.

A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.

A method for plating by means of a through-hole on a semiconductor wafer at least comprising the steps: providing a semiconductor wafer having a top side and a bottom side, wherein the semiconductor wafer has a plurality of solar cell stacks and comprises a substrate on the bottom side, and each solar cell stack has at least two III-V subcells, disposed on the substrate, and at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall, wherein the through-hole has a first edge region on the top side and a second edge region on the bottom side; applying an insulating layer to part of the first edge region, the side wall, and to the second edge region by means of a first printing process; and applying an electrically conductive layer.

A multijunction solar cell assembly and its method of manufacture including interconnected first and second discreate semiconductor body subassemblies disposed adjacent and parallel to each other, in the sense of the incoming illumination, each semiconductor body subassembly including first top subcell, and possibly third middle subcells and a bottom solar subcell; wherein the interconnected subassemblies form at least a Three junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor body with its at least least two junctions and the bottom solar subcell in the second semiconductor body representing the additional junction.