H01L33/642

PACKAGE STRUCTURE WITH WETTABLE SIDE SURFACE AND MANUFACTURING METHOD THEREOF, AND VERTICAL PACKAGE MODULE
20220392862 · 2022-12-08 ·

A package structure with a wettable side surface and a manufacturing method thereof, and a vertical package module are disclosed. The package structure includes a first dielectric layer, a chip and a circuit layer. The first dielectric layer is provided with a package cavity, side wall bonding pads are arranged on a side wall of the first dielectric layer and located outside the package cavity. The chip is packaged inside the package cavity, pins of the chip face first surface of the first dielectric layer. The circuit layer is arranged on the first surface of the first dielectric layer, and the circuit layer is directly or indirectly connected to the side wall bonding pads and the pins of the chip.

INTEGRATED CIRCUIT OPTICAL PACKAGE

A cap is mounted to a support substrate, the cap including a cap body and an optical shutter. The cap and support substrate define a housing. An electronic chip is disposed in the housing above the support substrate. A face of the electronic chip supports an optical device that is optically coupled with the optical shutter. The cap body is thermally conductive. Within the housing, a thermally conductive linking structure is coupled in a thermally conductive manner between the cap body and the electronic chip. The thermally conductive linking structure surrounds the electronic chip. A thermal interface material fills a portion of the housing between the thermally conductive linking structure and the cap body.

Folded heatsink design for thermal challenging LED applications

This specification discloses heatsinks comprising a continuous sheet of thermally conductive material folded into a structure comprising a plurality of fins defined by bends in the sheet and arranged to transfer heat to surrounding air. The sheet may be further folded to form a planar surface defined by one or more bends in the sheet and on which one or more LEDs may be mounted. Optionally, the sheet may be further folded to partially enclose the fins within a tunnel formed by side walls defined by bends in the sheet.

Optoelectronic component that dissipates heat
11588088 · 2023-02-21 · ·

An optoelectronic component includes a radiation side, a contact side opposite the radiation side having at least two electrically conductive contact elements, and a semiconductor layer sequence having an active layer that emits or absorbs the electromagnetic radiation, wherein the at least two electrically conductive contact elements have different polarities, are spaced apart from each other and are completely or partially exposed at the contact side in an unmounted state of the optoelectronic component, a region of the contact side is partially or completely covered with an electrically insulating, contiguously formed cooling element, the cooling element is in direct contact with the contact side and has a thermal conductivity of at least 30 W/(m.Math.K), and in a plan view of the contact side, the cooling element partially covers one or both of the at least two electrically conductive contact elements.

SEMICONDUCTOR CONTINUOUS ARRAY LAYER
20230101190 · 2023-03-30 ·

Disclosed is a color emissive LED array having a substantially flat backplane which has circuitry. The color emissive LED array includes a plurality of multi thickness color emissive LED units disposed in an array on the substantially flat backplane; The plurality of multi thickness color emissive LED units have a thickness of the first color emissive LED unit is less than a thickness of the second color emissive LED unit and less than a thickness of the third color emissive LED unit. Meanwhile, the substantially flat backplane having circuitry has one or more anode and one or more cathode. Further, the array is attached to the substantially flat backplane having circuitry by using a jointing layer.

OPTOELECTRONIC DEVICE AND METHOD
20230102780 · 2023-03-30 ·

An optoelectronic device includes a glass carrier, at least one light-scattering layer applied to the glass carrier, and at least one surface-emitting component in a chip size package with an emission surface and a surface facing away from the emission surface having a first and a second contact pad. The emission surface is arranged on the at least one light-scattering layer by way of an adhesive. At least one contact line contacts the second contact pad of the at least one surface-emitting component and extends along a side surface of the at least one surface-emitting component adjacent to the second contact pad in a direction of the glass carrier. A light-shaping structure is arranged on a surface of the glass carrier facing away from the surface-emitting component.

SEMICONDUCTOR LIGHT-EMITTING DEVICE AND LIGHT SOURCE DEVICE INCLUDING THE SAME
20230100183 · 2023-03-30 ·

A semiconductor light-emitting device includes a first submount and a semiconductor light-emitting chip. The semiconductor light-emitting chip includes a first surface, a first optical waveguide extending in a first direction parallel to the first surface and disposed closer to the first surface than to a second surface, and an emission surface that emits emission light. The first submount includes a first base including a third surface, and a spacer disposed on the third surface. The semiconductor light-emitting chip is bonded to the first submount with the first surface facing the spacer. The emission surface is positioned forward of a front end surface of the spacer. A first front surface, which is the front end surface of the first base, is positioned forward of the emission surface.

DEEP-SCALING AND MODULAR INTERCONNECTION OF DEEP ULTRAVIOLET MICRO-SIZED EMITTERS

A 1.8-times improved light extraction efficiency (LEE) is reported under DC test conditions for truncated cone AlGaN DUV micropixel LEDs when the pixel size was reduced from 90 to 5 .Math.m. This is shown to be a direct consequence of the absorption of the TM-polarized photons travelling in a direction parallel to the device epitaxial layers. Presently disclosed cathodoluminescence measurements show the lateral absorption length for 275 nm DUV photons to be 15 .Math.m, which is ~1000 times shorter than that for waveguiding in the A.sub.0.65Ga.sub.0.35N cladding layers. Results show the re-absorption of this laterally travelling emission by the multiple quantum wells and the p-contact GaN layer to be a key factor limiting the LEE. Hence, for DUV emitters, scaling down to sub-20 .Math.m device dimensions is critical for maximizing LEE. Presently disclosed sub-20 .Math.m AIGaN-based LEDs do not show pronounced edge recombination effects. The peak light output power was further increased for all the devices after the addition of a semi -reflective Al.sub.2O.sub.3/Al heat spreader despite the reduction in sidewall reflectivity.

Electronic element mounting substrate and electronic device
11617267 · 2023-03-28 · ·

An electronic element mounting substrate includes a first substrate that has a first main surface, has a rectangular shape, and has a mounting portion for an electronic element on the first main surface, and a second substrate that is located on a second main surface opposite to the first main surface, is made of a carbon material, has a rectangular shape, has a third main surface facing the second main surface and a fourth main surface opposite to the third main surface, in which the third main surface or the fourth main surface has heat conduction in a longitudinal direction greater than heat conduction in a direction perpendicular to the longitudinal direction, and that has a recessed portion on the fourth main surface.

DISPLAY DEVICE

A display device includes a first substrate, light emitting elements and a connection electrode on a first surface of the first substrate, and electrically connected to the light emitting elements, first pads spaced from the connection electrode in a direction, second pads spaced from the connection electrode in another direction, a circuit board including a first circuit board pad and a second circuit board pad, a first pad connection electrode connected to the first pads and the first circuit board pad, and including a first connection part in a first via hole passing through the first substrate, and a first electrode part on the first substrate, and a second pad connection electrode connected to the second pads and the second circuit board pad, and including a second connection part in a second via hole passing through the first substrate, and a second electrode part on the first substrate.