A semiconductor device includes a chip carrier, a first semiconductor chip arranged on the chip carrier, the first semiconductor chip being located in a first electrical potential domain when the semiconductor device is operated, a second semiconductor chip arranged on the chip carrier, the second semiconductor chip being located in a second electrical potential domain different from the first electrical potential domain when the semiconductor device is operated, and an electrically insulating structure arranged between the first semiconductor chip and the second semiconductor chip, which is designed to galvanically isolate the first semiconductor chip and the second semiconductor chip from each other.

A power module includes a power semiconductor element, an interconnection material, a circuit board, an external terminal, a joining material, and a sealing resin. A clearance portion is continuously formed between the sealing resin and each of an end surface of the joining material and a surface of the interconnection material so as to extend from the end surface of the joining material to the surface of the interconnection material, the end surface of the joining material being located between the power semiconductor element and the interconnection material, the surface of the interconnection material being located between the end surface and a predetermined position of the interconnection material separated by a distance from the end surface.

A semiconductor package includes an encapsulant body; an upper electrically conductive element having an outwardly exposed metal surface; a lower carrier substrate having an upper electrically conductive layer, a lower electrically conductive layer having an outwardly exposed surface, and an electrical insulation layer; a first electrically conductive spacer between the upper electrically conductive element and the upper electrically conductive layer; a power semiconductor chip between the upper electrically conductive element and the upper electrically conductive layer; and a second electrically conductive spacer between the upper electrically conductive element and the power semiconductor chip, a first carrier region of the upper electrically conductive layer is connected to a first power terminal, a second carrier region of the upper electrically conductive layer is alongside the first carrier region and is connected to a phase terminal, a first region of the upper electrically conductive element is connected to a second power terminal.

A glazing comprising a luminous means with a substrate having a first main surface, to which a first electrode is applied, a second electrode, and an organic layer stack within an active region of the substrate between the first and the second electrode, wherein the organic layer stack comprises at least one organic layer which is suitable for generating light, wherein the luminous means is arranged between two glass plates of the glazing of a window. Also, storage furniture is disclosed comprising a storage element shaped in planar fashion and having at least one storage surface and at least one radiation-emitting component, and at least one holding apparatus for holding the storage element.

An object of the invention is to manufacture a semiconductor module small. A metal wire (212) connecting a control electrode (101) and a control terminal (21) rises to form a first angle (θ1) from the control electrode (101) toward a first conductive portion (202), gradually goes in substantially parallel to the first conductive portion (202) as the metal wire approaches the first conductive portion (202), and is connected to the control terminal (21) to form a second angle (θ2) smaller than the first angle (θ1).

A display device is disclosed. The display device includes a substrate having a plurality of pixels, wherein each of the plurality of pixels includes at least one light emitting chip, and a structure on one side of at least one of the plurality of pixels. A base material of the light emitting chip is the same as a base material of the structure.

A power semiconductor device includes a power semiconductor chip and a fourth electrode. The power semiconductor chip has a first surface and a second surface opposite to each other and includes a first electrode and a second electrode on the first surface thereof, and a third electrode on the second surface thereof. The first electrode is provided in a main cell area of the first surface. The fourth electrode is provided on the first surface of the power semiconductor chip, is electrically connected to the first electrode, and has an overhanging portion that extends outwardly from an outer edge of the power semiconductor chip.

A semiconductor device of a double-side cooling structure having a bus bar electrically connected, and coolers independently arranged on both sides of the semiconductor device for cooling is provided. The semiconductor device includes: a semiconductor chip including an element, and has a first main surface and a second main surface; a sealing resin body having a first surface and a second surface and also having a side surface; a first heatsink arranged facing the first main surface and electrically connected to the first main electrode; and a second heatsink arranged facing the second main surface and electrically connected to the second main electrode. The first heatsink is exposed only to the first surface. The second heatsink is exposed only to the second surface. An exposed surface of a heatsink to be electrically connected to the bus bar has a heat dissipation region, and an electrical connection region.

A power conversion apparatus performs power conversion. The power conversion apparatus includes a semiconductor module and a cooler. The semiconductor module includes an insulated-gate bipolar transistor, a metal-oxide-semiconductor field-effect transistor, and a lead frame. The insulated-gate bipolar transistor and the metal-oxide-semiconductor field-effect transistor are connected in parallel to each other and provided on the same lead frame. The cooler has a coolant flow passage. The coolant flow passage extends such that the coolant flow passage and the lead frame of the semiconductor module are opposed to each other. The semiconductor module is configured such that the metal-oxide-semiconductor field-effect transistor is not disposed further downstream than the insulated-gate bipolar transistor in a flow direction of a coolant in the coolant flow passage of the cooler.

Provided is a bidirectional semiconductor package in which the number of processes for manufacturing the bidirectional semiconductor package is reduced. According to present application, a portion between one end and the other end of the buffer wire is in contact with the lower surface of the upper DBC substrate and heat generated by the semiconductor chip is transferred to the upper DBC substrate.