H01L2224/2612

Package-on-package type semiconductor device which is realized through applying not a TSV technology but a fan-out wafer level package technology
09793217 · 2017-10-17 · ·

A semiconductor device may include a bottom package embedded with a first semiconductor chip. The semiconductor device may include a middle package stacked over the bottom package, and embedded with at least two second semiconductor chips in a fan-out structure. The semiconductor device may include a top package stacked over the middle package, and embedded with at least two third semiconductor chips.

Semiconductor device in which an electrode of a semiconductor element is joined to a joined member and methods of manufacturing the semiconductor device
09824994 · 2017-11-21 · ·

A semiconductor device includes: a semiconductor element; a joined member that is joined to the semiconductor element and includes a nickel film; and a joining layer that is joined to the joined member and contains 2.0 wt % or higher of copper, in which the joining layer includes a solder portion and a Cu.sub.6Sn.sub.5 portion, base metal of the solder portion contains at least tin as a constituent element and contains elemental copper, and the Cu.sub.6Sn.sub.5 portion is in contact with the nickel film.

Method for creating a connection between metallic moulded bodies and a power semiconductor which is used to bond to thick wires or strips

The invention relates to a method for connecting a power semi-conductor chip having upper-sided potential surfaces to thick wires or strips, consisting of the following steps: Providing a metal molded body corresponding to the shape of the upper-sided potential surfaces, applying a connecting layer to the upper-sided potential surfaces or to the metal molded bodies, and applying the metal molded bodies and adding a material fit, electrically conductive compound to the potential surfaces prior to the joining of the thick wire bonds to the non-added upper side of the molded body.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
20170287849 · 2017-10-05 ·

A method of manufacturing a semiconductor device includes: providing, on a substrate, a first magnetic substrate including a base, a first side wall portion and a second side wall portion at opposed ends of the base, the sidewall portions extending from the base, providing a semiconductor chip over the base at a location between the first side wall portion and the second side wall portion, providing a plate-like magnetic substrate having a second surface, the second surface provided with a resin thereon, and positioning the plate-like magnetic substrate having a second surface with the resin thereon such that the second surface faces the base of the first magnetic substrate. Then the plate like magnetic substrate is moved in the direction of the first magnetic substrate to contact the second surface of the plate like magnetic substrate with the first side wall portion and the second side wall portion.

ELECTRONIC DEVICE MODULE AND MANUFACTURING METHOD THEREOF
20220051971 · 2022-02-17 · ·

An electronic device module includes a first board including a first side and a second side facing in opposite directions, the first side of the first board being configured to have a first electronic device mounted thereon; a second board adhered to the second side of the first board, and including a device accommodating portion that is a space formed by removing a central portion of the second board; a second electronic device disposed in the device accommodating portion and mounted on the second side of the first board so that the second electronic device is adjacent to an internal edge side of the second board defining a boundary of the device accommodating portion; and a bonding layer disposed in a gap between the first board and the second board and extending into a gap between the second side of the first board and the second electronic device, the bonding layer bonding the second board and the second electronic device to the first board.

ELECTRONIC DEVICE MODULE AND MANUFACTURING METHOD THEREOF
20220051971 · 2022-02-17 · ·

An electronic device module includes a first board including a first side and a second side facing in opposite directions, the first side of the first board being configured to have a first electronic device mounted thereon; a second board adhered to the second side of the first board, and including a device accommodating portion that is a space formed by removing a central portion of the second board; a second electronic device disposed in the device accommodating portion and mounted on the second side of the first board so that the second electronic device is adjacent to an internal edge side of the second board defining a boundary of the device accommodating portion; and a bonding layer disposed in a gap between the first board and the second board and extending into a gap between the second side of the first board and the second electronic device, the bonding layer bonding the second board and the second electronic device to the first board.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
20170278774 · 2017-09-28 ·

A semiconductor device includes: a semiconductor chip having an electrode on one surface; a first conductive member disposed on one surface side of the semiconductor chip; a metal member having a base member and a membrane and disposed between the semiconductor chip and the first conductive member; a first solder disposed between the electrode of the semiconductor chip and the metal member; and a second solder disposed between the metal member and the first conductive member. The membrane has a metal thin film arranged on the surface of the base member and an uneven oxide film. The uneven oxide film is arranged on the metal thin film in at least a part of a connection region of a surface of the metal member, the connection region connecting a first connection region to which the first solder is connected and a second connection region to which the second solder is connected.

PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

A packaging structure including first, second, and third dies, an encapsulant, a circuit structure, and a filler is provided. The encapsulant covers the first die. The circuit structure is disposed on the encapsulant. The second die is disposed on the circuit structure and is electrically connected to the circuit structure. The third die is disposed on the circuit structure and is electrically connected to the circuit structure. The third die has an optical signal transmission area. The filler is disposed between the second die and the circuit structure and between the third die and the circuit structure. A groove is present on an upper surface of the circuit structure. The upper surface includes first and second areas located on opposite sides of the groove. The filler directly contacts the first area. The filler is away from the second area. A manufacturing method of a packaging structure is also provided.

PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

A packaging structure including first, second, and third dies, an encapsulant, a circuit structure, and a filler is provided. The encapsulant covers the first die. The circuit structure is disposed on the encapsulant. The second die is disposed on the circuit structure and is electrically connected to the circuit structure. The third die is disposed on the circuit structure and is electrically connected to the circuit structure. The third die has an optical signal transmission area. The filler is disposed between the second die and the circuit structure and between the third die and the circuit structure. A groove is present on an upper surface of the circuit structure. The upper surface includes first and second areas located on opposite sides of the groove. The filler directly contacts the first area. The filler is away from the second area. A manufacturing method of a packaging structure is also provided.

Semiconductor device

A semiconductor device may be provided with: a semiconductor chip; an encapsulant encapsulating the semiconductor chip therein; and a conductor member joined to the semiconductor chip via a solder layer within the encapsulant. The conductor member may comprise a joint surface in contact with the solder layer and a side surface extending from a peripheral edge of the joint surface. The side surface may comprise an unroughened area and a roughened area that is greater in surface roughness than the unroughened area. The unroughened area may be located adjacent to the peripheral edge of the joint surface.