A method of forming a bonding assembly that includes positioning a plurality of polymer spheres against an opal structure and placing a substrate against a second major surface of the opal structure. The opal structure includes the first major surface and the second major surface with a plurality of voids defined therebetween. The plurality of polymer spheres encapsulates a solder material disposed therein and contacts the first major surface of the opal structure. The method includes depositing a material within the voids of the opal structure and removing the opal structure to form an inverse opal structure between the first and second major surfaces. The method further includes removing the plurality of polymer spheres to expose the solder material encapsulated therein and placing a semiconductor device onto the inverse opal structure in contact with the solder material.

The present invention provides a chip packaging structure having a heat dissipation plate and a manufacturing method thereof. The packaging structure includes a substrate; at least one chip, disposed on a first surface of the substrate; the heat dissipation plate is bonded to the first surface, the heat dissipation plate and the substrate form a cavity in a surrounding manner for holding the chip therein, the heat dissipation plate and the chip are connected by at least one fixed connector, a thermal interface material is filled in a region among the heat dissipation plate, the chip and the fixed connector, and a connection strength between the fixed connector and the chip or the heat dissipation plate is greater than a connection strength between the thermal interface material and the chip or the heat dissipation plate. Thus, the connection strength between the chip and the heat dissipation plate is increased.

The present invention provides a chip packaging structure having a heat dissipation plate and a manufacturing method thereof. The packaging structure includes a substrate, at least one chip, the heat dissipation plate, a plastic packaging layer and a metal shielding layer, wherein the heat dissipation plate is bonded to a first surface of the substrate, a thermal interface material is filled between the heat dissipation plate and the chip, the heat dissipation plate is connected to the first surface, and a connection strength between the conductive connector and the substrate and the heat dissipation plate is greater than a connection strength between the thermal interface material and the chip and the heat dissipation plate; the plastic packaging layer exposes at least part of a surface region of the heat dissipation plate; and the metal shielding layer is at least connected to the surface region.

Disclosed herein are integrated circuit (IC) packages with solder thermal interface materials (STIM), as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, a die between the package substrate and the lid, and a STIM between the die and the lid. The STIM may have a thickness that is less than 200 microns.

Disclosed herein are integrated circuit (IC) packages with solder thermal interface materials (STIM), as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, a die between the package substrate and the lid, and a STIM between the die and the lid. The STIM may have a thickness that is less than 200 microns.

An integrated circuit includes a substrate and at least one chip. Each chip is disposed over the substrate or the other chip. Solder bumps are disposed between the substrate and the at least one chip. An insulating film is disposed around the solder bumps and provides electrical insulation for the solder bumps except areas for interconnections. A thermally conductive underfill is disposed between the substrate, the at least one chip, and the solder bumps.

An integrated circuit includes a substrate and at least one chip. Each chip is disposed over the substrate or the other chip. Solder bumps are disposed between the substrate and the at least one chip. An insulating film is disposed around the solder bumps and provides electrical insulation for the solder bumps except areas for interconnections. A thermally conductive underfill is disposed between the substrate, the at least one chip, and the solder bumps.

A semiconductor die is bonded using epoxy onto a substrate supported on a heating platform. After preheating the substrate with the heating platform to a temperature of between 25 C. and 60 C., an epoxy dispenser deposits an epoxy dot onto the substrate before the semiconductor die is placed onto the epoxy dot with a pick head to thereby bond the semiconductor die onto the substrate.

A light-emitting diode (LED) chip includes a semiconductor epitaxial structure, an insulating substrate, a first metal layer, and a second metal layer. The semiconductor epitaxial structure includes a first semiconductor epitaxial layer, a second semiconductor epitaxial layer, and a light-emitting layer interposed between the first semiconductor epitaxial layer and the second semiconductor epitaxial layer. The insulating substrate has two opposite surfaces, and the first and second metal layers are respectively disposed on the two surfaces of the insulating substrate. An LED device and an LED lamp including the LED chip are also disclosed.

A package includes package includes a first package component including a first plurality of electrical connectors at a top surface of the first package component, and a second plurality of electrical connectors longer than the first plurality of electrical connectors at the top surface of the first package component. A first device die is over the first package component and bonded to the first plurality of electrical connectors. A second package component is overlying the first package component and the first device die. The second package component includes a third plurality of electrical connectors at a bottom surface of the second package component. The third plurality of electrical connectors is bonded to the second plurality of electrical connectors. A fourth plurality of electrical connectors is at a bottom surface of the second package. The second and the fourth plurality of electrical connectors comprise non-solder metallic materials.