In a soldering structure, a power module having the same, and a method for manufacturing the power module configured for constantly determining a height of a power module when the power module is manufactured, the soldering structure may include a soldering target portion; a metal layer including a bonding surface having a bonding region in which the soldering target portion is bonded by solder; and at least one wire located in the solder within the bonding region.

A power module includes a first substrate including a first metal plate, a second substrate spaced apart from the first substrate and having a second metal facing the first substrate, a plurality of power elements that are disposed between the first substrate and the second substrate and include a first electrode and a second electrode. The plurality of power elements include a first power element having the first electrode bonded to the second metal plate, and a second power element having the first electrode bonded to the first metal plate.

In a soldering structure, a power module having the same, and a method for manufacturing the power module configured for constantly determining a height of a power module when the power module is manufactured, the soldering structure may include a soldering target portion; a metal layer including a bonding surface having a bonding region in which the soldering target portion is bonded by solder; and at least one wire located in the solder within the bonding region.

In one embodiment, a semiconductor manufacturing apparatus includes a reformer configured to partially reform a first substrate to form a reformed layer between a first portion and a second portion in the first substrate. The apparatus further includes a joiner configured to form a joining layer between the first portion and a second substrate to join the first portion and the second substrate. The apparatus further includes a remover configured to remove the second portion from a surface of the second substrate while making the first portion remain on the surface of the second substrate by separating the first portion and the second portion.

A semiconductor package comprising a fan-out structure and a manufacturing method therefor are disclosed. A semiconductor package according to an embodiment of the present invention comprises: a wiring unit comprising an insulation layer and a wiring layer; a semiconductor chip mounted on the wiring unit and coupled to the wiring layer by flip-chip bonding; a filling member for filling a gap between the semiconductor chip and the wiring unit; and a film member for performing coating so as to cover one surface of each of the semiconductor chip, the filling member, and the wiring unit.

An emission enhancement structure having at least one energy augmentation structure; and an energy converter capable of receiving energy from an energy source, converting the energy and emitting therefrom a light of a different energy than the received energy. The energy converter is disposed in a vicinity of the at least one energy augmentation structure such that the emitted light is emitted with an intensity larger than if the converter were remote from the at least one energy augmentation structure. Also described are various uses for the energy emitters, energy augmentation structures and energy collectors in a wide array of fields, including various adhesives applications.

An emission enhancement structure having at least one energy augmentation structure; and an energy converter capable of receiving energy from an energy source, converting the energy and emitting therefrom a light of a different energy than the received energy. The energy converter is disposed in a vicinity of the at least one energy augmentation structure such that the emitted light is emitted with an intensity larger than if the converter were remote from the at least one energy augmentation structure. Also described are various uses for the energy emitters, energy augmentation structures and energy collectors in a wide array of fields, such as color enhancement, and color enhancement structures containing the same.

A semiconductor package includes a base chip and at least one semiconductor chip disposed on the base chip. An adhesive film is disposed between the base chip and the at least one semiconductor chip and is configured to fix the at least one semiconductor chip on the base chip. The adhesive film includes an inner film portion that overlaps the at least one semiconductor chip in a thickness direction of the base chip, and an outer film portion that does not overlap the at least one semiconductor chip in the thickness direction of the base chip. A width of the outer film portion in a direction perpendicular to a lateral edge of the at least one semiconductor chip is substantially uniform within a deviation range of 20% of an average width of the outer film portion.

Implementations of methods of forming a plurality of reinforced die may include forming a plurality of die on a substrate and patterning a metal gang frame to form a plurality of metal plates. The plurality of metal plates may correspond to the plurality of die. The method may include coupling the metal gang frame over the plurality of die and singulating the plurality of die. Each die of the plurality of die may include the corresponding metal plate from the plurality of metal plates coupled over the plurality of die.

A method of manufacturing a micro light emitting diode (LED) display module. The method of manufacturing a micro LED display module may include: pressing a plurality of micro LEDs disposed on a substrate to which an adhesive layer is applied, to electrically connect the plurality of micro LEDs to electrode pads of the substrate; performing testing to detect whether at least one of the plurality of micro LEDs is defective in a state in which the plurality of micro LEDs are pressurized and the adhesive layer is uncured; and based on detecting that at least one of the plurality of micro LEDs is defective, performing control to harden the adhesive layer.