A circuit includes a transformer having a primary coil coupled to a first power amplifier (PA) and a second PA, and a secondary coil. The secondary coil supplies a current to an antenna based on a first direction of a first phase of a first amplified constant-envelope signal in the primary coil with respect to a second phase of a second amplified constant-envelope signal in the primary coil. The circuit further includes load impedance coupled between a median point of the primary coil and ground. The load impedance is adjusted to match one of an impedance of the differential antenna, an impedance of the first PA, and an impedance of the second PA, based on the ripples detected by the ripple detector.

A method and apparatus for decomposition of signals with varying envelope into offset components are disclosed here, that sample the time variant envelope of a single carrier (SC) or a multi-carrier (MC) band limited signal, quantizes the sampled value using N.sub.b quantization bits and decomposes the sample into N.sub.b in-phase and quadrature components that are combined in pairs and modulated to generate a set of N.sub.b offset signals. The pulse shape applied in each offset signal is selected according to the spectral mask needed for the signal and to minimize envelope fluctuations in each offset signal from the set of N.sub.b components.

An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S.sub.1(t)). A first reactive element (C.sub.A-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (L.sub.A-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S.sub.2(t)), a third reactive element (C.sub.A-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (L.sub.EEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.

For generating quantized signals, a quantized phase domain related to quantized phases of an input signal is generated. Vectors that the input signal may occupy are calculated based on the quantized phase domain. A first quantized phase of a first component of the input signal is generated per the quantized phase domain, and a second quantized phase of a second component of the input signal is generated per the quantized phase domain.

The application provides a radio frequency circuit, including: a first circuit and a second circuit. The first circuit is configured to receive a first signal and a second signal; split the first signal into a third signal and a fourth signal, and split the second signal into a fifth signal and a sixth signal; adjust a phase of the fifth signal to obtain a seventh signal; and combine the seventh signal and the third signal into an eighth signal. The second circuit includes a primary power amplifier branch and a secondary power amplifier branch, and the primary power amplifier branch is configured to process the fourth signal and the sixth signal, and the secondary power amplifier branch is configured to process the eighth signal.

The present invention relates to an amplifying device and to an amplifying system comprising the same. According to the present invention, an amplifier line-up is presented comprising four amplifying units which is operable in a Doherty mode and an outphasing mode. By integration of Chireix compensating elements in the matching networks used in the amplifying units a bandwidth improvement can be obtained.

A driver circuit for a composite power amplifier configured to operate in at least one Chireix-mode a first and a second sub-amplifier for amplification of an input signal into an output signal is disclosed. An input network of the driver circuit comprises a means configured to provide a first signal which is linearly derivable from the input signal, and a second signal which is non-linearly derivable from the input signal. The input network combines the first signal, at zero degrees phase shift, and the second signal, at 90 degrees phase shift, to obtain a first feeding signal for the first sub-amplifier. Furthermore, the input network combines the first signal, at 180 degrees phase shift, and the second signal, at 90 degrees phase shift, to obtain a second feeding signal for the second sub-amplifier.

An outphasing amplifier having: a first branch to receive and process a first branch signal, the first branch signal being phase modulated, with constant amplitude envelope; and a second branch arranged to receive and process a second branch signal, the second branch signal being phase modulated, with constant amplitude envelope, and at least a portion of the second branch signal anti-phase from the first branch signal, wherein each branch includes: circuitry arranged to process the signal to reduce the energy in sidebands of the signal away from the central frequency, while retaining the phase information in the signal; and an amplifier arranged to amplify the filtered and re-asserted branch signal.

An encoding modulation method and transmitter are described. The method includes: oversampling and noise-shaping received multi-bit data to obtain N bits of data; using the N bits of data as a lookup table address to obtain a PWM puke modulation signal; multiplexing synthetic orthogonal (IQ) complex data of the PWM pulse modulation signal to be real number signal data; and converting the multiplexed real number signal data to an analog signal for power amplification and output, N being an integer representing a smaller number of bits than the received multi-bit data.

The present disclosure provides example power amplifier combiner apparatuses and power amplifier circuits. One example power amplifier combiner apparatus includes a signal processing unit and n power amplifier units. The signal processing unit is separately coupled to input terminals of the n power amplifier units. Output terminals of the n power amplifier units are separately coupled to a load. When an output power of the power amplifier combiner apparatus is less than a first threshold, the signal processing unit controls a first power amplifier unit to operate. When the output power is greater than or equal to an i.sup.th threshold and is less than an (i+1).sup.th threshold, the signal processing unit controls the first i+1 power amplifier units to operate. When the output power is not less than an (n−1).sup.th threshold, the signal processing unit controls the n power amplifier units to operate, where i=1, . . . , or n−2.