Disclosed is a differential transimpedance amplifier (TIA). In the differential TIA, an input end of the first source follower is coupled to the first output end of a first differential amplification circuit. The output end of the first source follower is coupled to the second input end of a second differential amplification circuit with feedback and a first feedback resistor. The input end of a second source follower is coupled to the second output end of the first differential amplification circuit. The output end of the second source follower is coupled to the first input end of the second differential amplification circuit with feedback and a second feedback resistor. A photo diode and a dummy diode are coupled respectively to two input ends of the first differential amplification circuit.

Disclosed is a differential transimpedance amplifier. The differential transimpedance amplifier includes a common gate amplifier configured to receive an electrical signal from an input node, and a common source amplifier configured to have a feedback resistor and receive the electrical signal form the input node. An output signal of the common gate amplifier and an output signal of the common source amplifier form a differential signal pair. The common gate amplifier and the common source amplifier each includes a load having a transformer which removes an effect of parasitic capacitance

This invention relates to low noise sensor amplifiers and trans-impedance amplifiers using a complementary pair of current injection field effect transistor (iFET) devices (CiFET). CiFET includes a N-type current field-effect transistor (NiFET) and a P-type current field-effect transistor (PiFET), each of the NiFET and PiFET has a source, a drain, a gate, and a diffusion (current injection) terminal (iPort). Each iFET also has a source channel with a width and a length between the source and diffusion terminal, and drain channel with a width and a length between the drain and the diffusion terminal. A trans-impedance of the CiFET device is adjusted by a ratio of width/length of source channel over width/length of drain channel of the iFET and supply power voltage. In one configuration, the gate terminals of the NiFET and PiFET are connected together to form a common gate. In another configuration that common gate is configured as a voltage input for a high input impedance mode. Output voltage swings around a common mode voltage.

Disclosed is a differential transimpedance amplifier. The differential transimpedance amplifier includes a common gate amplifier configured to receive an electrical signal from an input node, and a common source amplifier configured to have a feedback resistor and receive the electrical signal form the input node. An output signal of the common gate amplifier and an output signal of the common source amplifier form a differential signal pair. The common gate amplifier and the common source amplifier each includes a load having a transformer which removes an effect of parasitic capacitance.

A circuit includes a first signal swapper including a first terminal coupled to a first current source, a second terminal coupled to a second current source, a third terminal coupled to a first current terminal of a first transistor, and a fourth terminal coupled to a third current terminal of a second transistor. The first signal swapper couples the first and second terminals to the third and fourth terminals responsive to a first control signal. First and second switches couple to a gate of the first transistor. The first switch receives the input oscillation signal and the second switch receives a first reference voltage. Third and fourth switches couple to a gate of the second transistor. The third switch receives the input oscillation signal and the fourth switch receives the first reference voltage. A second signal swapper couples to the first signal swapper and to the first and second transistors.

An operational amplifier circuit is provided. The operational amplifier circuit includes a differential input stage circuit and a loading stage circuit. The differential input stage circuit includes an input circuit, a voltage maintaining circuit, and a current source. The input circuit includes a first input transistor and a second input transistor, for receiving a first and a second input signals, respectively. The voltage maintaining circuit includes a first branch circuit and a second branch circuit. The first branch circuit is coupled to the first input transistor for receiving the first input signal, and the second branch circuit is coupled to the second input transistor for receiving the second input signal. The current source is coupled to the first input transistor and the second input transistor. The loading stage circuit is coupled to the voltage maintaining circuit.

A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.

A differential amplifier circuit is provided. The differential amplifier circuit includes a differential amplifier, a first active inductor, a second active inductor, and a parameter circuit. The differential amplifier includes a first differential output terminal and a second differential output terminal. The first active inductor is coupled to the first differential output terminal. The second active inductor is coupled to the second differential output terminal. The parameter circuit is coupled between the first active inductor and the second active inductor. The parameter circuit provides at least one parameter. A low frequency gain, an equivalent impedance, and a bandwidth of the differential amplifier circuit are adjusted in response to the at least one parameter.

Disclosed is a 5G (5.sup.th generation) or pre-5G communication system for supporting a data transmission rate higher than that of a 4G (4.sup.th generation) communication system such as long-term evolution (LTE). A transmission device comprises: a first amplification unit having a common source structure, including cross coupled capacitors, and amplifying an input signal; a second amplification unit, having a common gate structure, for amplifying a signal output from the first amplification unit; and a first removal unit which is connected to output terminals of the first amplification unit and input terminals of the second amplification unit and which removes at least one portion of second harmonics. The first removal unit can offset, with respect to a fundamental frequency, at least some of parasitic capacitance generated from the output terminals of the first amplification unit and the input terminals of the second amplification unit, and can ground a signal having a secondary harmonic frequency with respect to the secondary harmonic frequency.

The present invention relates to an improvement to a current field effect transistor and trans-impedance MOS devices based on a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. The present invention further relates to a super-saturation current field effect transistor (xiFET), having a source, a drain, a diffusion, a first gate, and a second gate terminals, in which a source channel is defined between the source and diffusion terminals, a drain channel is defined between the drain and diffusion terminals. The first gate terminal is capacitively coupled to the source channel; and the second gate terminal is capacitively coupled to said drain channel.The diffusion terminal receives a current causing change in diffused charge density throughout said source and drain channel. The xiFET provides a fundamental building block for designing various analog circuites.