A power generator includes a plurality of amplifier blocks and a combiner. Each of the amplifier blocks include one or more amplifiers, and the combiner combines modulated power signals output from the amplifier blocks to generate an RF power signal of a load. The amplifier blocks are controlled to outphase the modulated power signals based on a phase angle. Ones of the amplifier blocks may perform discrete modulation to generate a respective one of the modulated power signals. The discrete modulation includes selecting different combinations of the amplifiers in one or more of the amplifier blocks to change the RF power signal in discrete steps. In embodiments, the amplifiers may be radio frequency power amplifiers.

The present disclosure provides example power amplifier combiner apparatuses and power amplifier circuits. One example power amplifier combiner apparatus includes a signal processing unit and n power amplifier units. The signal processing unit is separately coupled to input terminals of the n power amplifier units. Output terminals of the n power amplifier units are separately coupled to a load. When an output power of the power amplifier combiner apparatus is less than a first threshold, the signal processing unit controls a first power amplifier unit to operate. When the output power is greater than or equal to an i.sup.th threshold and is less than an (i+1).sup.th threshold, the signal processing unit controls the first i+1 power amplifier units to operate. When the output power is not less than an (n−1).sup.th threshold, the signal processing unit controls the n power amplifier units to operate, where i=1, . . . , or n−2.

A multistage Doherty power amplifier and a transmitter are provided, and the multistage Doherty power amplifier includes: a generalized carrier amplifier, which is a nested 2-way inverted Doherty sub amplifier, and a generalized peaking amplifier, connected to the generalized carrier amplifier, which is a nested single ended sub amplifier or a nested 2-way normal Doherty sub amplifier, the generalized carrier amplifier and the generalized peaking amplifier are arranged in a generalized 2-way inverted Doherty power amplifier form. With the multistage Doherty power amplifier, signal power probability distribution function (PDF) oriented for a cost-effective multi stage Doherty PA design is applied, and 2-way normal and inverted Doherty PA cells are used as basic units to construct multistage Doherty PA with gain extension effect.

A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

Provided is an emphasis circuit capable of obtaining a desired emphasis amount with which waveform deterioration of an output signal in a high frequency band (high frequency band deterioration) is suppressed without increasing power consumption (current consumption). In the emphasis circuit, a baseband amplifier section and a peaking amplifier section are connected in parallel to each other, and respective drive current setting sections are adjusted to adjust respective drive current values thereof so that the sum of the drive current value of the baseband amplifier section and the drive current value of the peaking amplifier section may be constant.

A power amplifier system for amplifying an input having a carrier frequency having an amplitude. The system includes a plurality of n amplifiers coupled to an asymmetrical combiner formed of a passive network, each amplifier has an input and an output, the asymmetrical combiner has a plurality of inputs and an output, the output of each amplifier is coupled to an input of the asymmetrical combiner, an impedance viewed at the output of each of the n amplifiers is a function of the amplitude and phase at each of the other n−1 amplifiers. An amplitude/phase controller is coupled to the plurality of n amplifiers or the asymmetrical combiner to control the amplitude/phase at the asymmetrical combiner input. The amplitude/phase controller is configured to present an amplitude/phase at each input of the asymmetrical combiner to target an optimal impedance at the carrier frequency for each of the plurality of n amplifiers.

Provided is a power amplification circuit that includes: a first transistor that has an emitter to which a first radio frequency signal is supplied, a base to which a first DC control current or DC control voltage is supplied and a collector that outputs a first output signal that corresponds to the first radio frequency signal; a first amplifier that amplifies the first output signal and outputs a first amplified signal; and a first control circuit that supplies the first DC control current or DC control voltage to the base of the first transistor in order to control output of the first output signal.

Transformer-based Doherty power amplifier (PA). In some embodiments, a Doherty PA can include a carrier amplification path having an output that includes a carrier transformer, and a peaking amplification path having an output that includes a peaking transformer. The Doherty PA can further include a combiner configured to combine the outputs of the carrier and peaking amplification paths into an output node. The combiner can include a quarter-wave circuit implemented between the carrier and peaking transformers.

An embodiment of a Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and a peaking amplifier die. The RF signal splitter divides an input RF signal into first and second input RF signals, and conveys the first and second input RF signals to first and second splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier die includes one or more second power transistors configured to amplify, along a peaking signal path, the second input RF signal to produce an amplified second RF signal. The carrier and peaking amplifier die are coupled to the substrate so that the RF signal paths through the carrier and peaking amplifier die extend in substantially different (e.g., orthogonal) directions.

An RF matrix switch has a first set of card slots at selected locations on the chassis and a second set of card slots at different selected locations on the chassis as well as input cards and output cards. The input cards, the output cards, the first set of card slots and the second set of card slots are all configured so that the input cards and the output cards fit into all of these slots. Reroute cards can be provided for any unused card slots. The RF matrix switch also may have an active power management system in which there is a power control switch connected to each amplifier that turns the amplifier off when the amplifier is not being used.