A method and an integrated circuit for limiting a switchable load current. The integrated circuit includes a main transistor, through which in the conductive state a load current flows for supplying a load and a mirror transistor, a gate terminal of the mirror transistor being electrically connected to a gate terminal of the main transistor and a source terminal of the mirror transistor being electrically connected to a source terminal of the main transistor. The integrated circuit further includes a coupling circuit, which is configured to track a source drain voltage of the mirror transistor as a function of the source drain voltage of the main transistor. A gate control circuit is further provided, which limits the load current through the main transistor on the basis of a drain current through the mirror transistor.

A short circuit detection circuit includes a current terminal, a sense resistor, an amplifier, and a resistor-capacitor ladder. The sense resistor is coupled to the current terminal, and is configured to develop a sense voltage proportional to a current through the current terminal. The amplifier is coupled to the sense resistor, and is configured to generate a scaled current proportional to the sense voltage. The resistor-capacitor ladder is coupled to the amplifier, and is configured to generate a measurement voltage that represents a surface temperature rise due to the current through the current terminal.

A switch device includes an output transistor, an overcurrent protection circuit configured to be capable of performing an overcurrent protection operation in which magnitude of target current flowing in the output transistor is limited to a predetermined upper limit current value or less, and a control circuit configured to be capable of controlling a state of the output transistor and capable of changing the upper limit current value among a plurality of current values including a predetermined first current value and a predetermined second current value less than the first current value. The control circuit can limit the magnitude of the target current to the first current value or less in response to the magnitude of the target current reaching the first current value, and then change the upper limit current value to the second current value.

Methods, apparatus, systems, and articles of manufacture are disclosed for a multi-level turn-off circuit. An example power delivery circuit includes a two-level turn-off circuit to be coupled to a first switch to reduce a first gate voltage of the first switch from a first voltage to a second voltage when a current flowing through the first switch is greater than an over-current threshold, the two-level turn-off circuit including a second switch, a voltage-current-voltage buffer to reduce a second gate voltage of the second switch from a third voltage to a fourth voltage, and a comparator circuit to turn off the second switch when the second gate voltage is the fourth voltage, and a driver to be coupled to the first switch to turn off the first switch when the second gate voltage is the fourth voltage.

A motor protecting circuit is provided. A first terminal of each of high-side transistors is coupled to a power supply voltage. A second terminal of each of low-side transistors is grounded. Second terminals of the high-side transistors are respectively connected to first terminals of the low-side transistors. An overvoltage detector circuit is coupled to the power supply voltage of an output circuit. When the overvoltage detector circuit determines that the power supply voltage of the output circuit is higher than a voltage threshold, the overvoltage detector circuit outputs an overvoltage detected signal to a controller circuit. According to the overvoltage detected signal, the controller circuit controls a driver circuit to turn on at least one of the high-side transistors and at least one of the low-side transistors at the same time.

A turn-off protection circuit and a turn-off protection method for a switch unit. The switch unit may include a first set of switching devices coupled between a first circuit node and an output node, and a second set of switching devices coupled between a second circuit node and the output node. The turn-off protection circuit may compare a first circuit node potential at the first circuit node and/or a second circuit node potential at the second circuit node with a switch node potential at the output node to detect a the flow direction of the a freewheeling current when the switch unit is turned off, and turn on and maintain the first set of switching devices or the second set of switching devices on depending on the flow direction of the freewheeling current until the freewheeling current is reduced to a predetermined safe current threshold.

A load switch includes a switch input, a switch output, a first field-effect transistor (FET), and a second FET. The switch input is adapted to be coupled to a controller output of a controller. The switch output is adapted to be coupled to a controller input of the controller. The first FET has a gate and a source. The gate of the first FET is coupled to the switch input. The second FET has a gate and a source. The gate of the second FET is coupled to the source of the first FET. The source of the second FET is coupled to the switch output.

An active gate driver suitable for activating an electronic switch of an electric motor. The active gate driver includes a pull up branch, a pull down branch and a current and voltage feedback from an output of the active gate driver to at least one input of the active gate driver, wherein the current and voltage feedback is common to both the pull up branch and the pull down branch.

A method for active gate driving a switching circuit, wherein: a characteristic of a waveform controlled by the switching circuit is represented by a function mapping an input variable to an output metric, and wherein: the input variable comprises: a design variable having a first set of possible values; and an environmental variable having a second set of possible values, wherein the environmental variable is observable but not controllable. The method comprising: performing Bayesian optimisation on the function to generate a model of the function, wherein a next value of the design variable for evaluating the function is selected based on values of an acquisition function associated with a predicted value of the environmental variable; determining a first value of the design variable that optimises the model of the function; and controlling the switching circuit according to the first value of the design variable.

An electronic device includes a first group III nitride transistor and an over current protection circuit (OCP). The OCP circuit includes an input device and a detection device. The input device is configured to receive a control signal and to generate a first voltage to a gate of the first group III nitride transistor. The detection device is configured to generate an output signal having a first logical value if a current at a drain of the first group III nitride transistor is less than a predetermined value and to generate the output signal having a second logical value if the current at the drain of the first group III nitride transistor is equal to or greater than the predetermined value, wherein the first logical value is different from the second logical value.