H01L21/02518

Method of laser separation of the epitaxial film or the epitaxial film layer from the growth substrate of the epitaxial semiconductor structure (variations)

The present invention proposes variations of the laser separation method allowing separating homoepitaxial films from the substrates made from the same crystalline material as the epitaxial film. This new method of laser separation is based on using the selective doping of the substrate and epitaxial film with fine donor and acceptor impurities. In selective doping, concentration of free carries in the epitaxial film and substrate may essentially differ and this can lead to strong difference between the light absorption factors in the infrared region near the residual beams region where free carriers and phonon-plasmon interaction of the optical phonons with free carriers make an essential contribution to infrared absorption of the optical phonons. With the appropriate selection of the doping levels and frequency of infrared laser radiation, it is possible to achieve that laser radiation is absorbed in general in the region of strong doping near the interface substrate-homoepitaxial film. When scanning the interface substrate-homoepitaxial film with the focused laser beam of sufficient power, thermal decomposition of the semiconductor crystal takes place with subsequent separation of the homoepitaxial film. The advantage of the proposed variations of the method for laser separation of epitaxial films in comparison with the known ones is in that it allows the separation of homoepitaxial films from the substrates, i.e., homoepitaxial films having the same width of the forbidden gap as the initial semiconductor substrate has. The proposed variations of the method can be used for separation of the epitaxial films.

Methods for isolating portions of a loop of pitch-multiplied material and related structures
09941155 · 2018-04-10 · ·

Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of the loop. In some embodiments, loops of semiconductor material, having two legs connected together at their ends, are formed by a pitch multiplication process in which loops of spacers are formed on sidewalls of mandrels. The mandrels are removed and a block of masking material is overlaid on at least one end of the spacer loops. In some embodiments, the blocks of masking material overlay each end of the spacer loops. The pattern defined by the spacers and the blocks are transferred to a layer of semiconductor material. The blocks electrically connect together all the loops. A select gate is formed along each leg of the loops. The blocks serve as sources/drains. The select gates are biased in the off state to prevent current flow from the mid-portion of the loop's legs to the blocks, thereby electrically isolating the mid-portions from the ends of the loops and also electrically isolating different legs of a loop from each other.

Anti-stiction process for MEMS device

A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.

Methods for Isolating Portions of a Loop of Pitch-Multiplied Material and Related Structures
20170250110 · 2017-08-31 · ·

Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of the loop. In some embodiments, loops of semiconductor material, having two legs connected together at their ends, are formed by a pitch multiplication process in which loops of spacers are formed on sidewalls of mandrels. The mandrels are removed and a block of masking material is overlaid on at least one end of the spacer loops. In some embodiments, the blocks of masking material overlay each end of the spacer loops. The pattern defined by the spacers and the blocks are transferred to a layer of semiconductor material. The blocks electrically connect together all the loops. A select gate is formed along each leg of the loops. The blocks serve as sources/drains. The select gates are biased in the off state to prevent current flow from the mid-portion of the loop's legs to the blocks, thereby electrically isolating the mid-portions from the ends of the loops and also electrically isolating different legs of a loop from each other.

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
20170236822 · 2017-08-17 ·

A semiconductor device includes: a substrate having a first region and a second region; a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; a first bump on the first region; a first doped layer on the first fin-shaped structure and the bump; and a gate structure covering the bump.

DRY PUMP AND EXHAUST GAS TREATMENT METHOD
20170204860 · 2017-07-20 ·

An object of the present invention is to provide a dry pump and an exhaust gas treatment method which can improve an effect of inhibiting a reaction product from adhering to the inside of a gas outlet port of the dry pump, a gas exhaust pipe, or the like and can also improve an energy saving effect. To attain the object, the present invention includes the gas exhaust pipe disposed to be connected to the gas outlet port of the dry pump and to a gas inlet port of a detoxification device, and a heat exchanger which heats a diluent gas introduced therein using a heat generated from the dry pump and introduces the heated diluent gas into the gas exhaust pipe to heat a used gas to a temperature of not less than a predetermined value.

SEMICONDUCTOR NANOCRYSTALS AND METHODS
20170186608 · 2017-06-29 ·

In one embodiment, a method for forming a coating comprising a semiconductor material on at least a portion of a population of semiconductor nanocrystals comprises providing a first mixture including semiconductor nanocrystals and an aromatic solvent, introducing one or more cation precursors and one or more anion precursors into the first mixture to form a reaction mixture for forming the semiconductor material, reacting the precursors in the reaction mixture, without the addition of an acid compound, under conditions sufficient to grow a coating comprising the semiconductor material on at least a portion of an outer surface of at least a portion of the semiconductor nanocrystals, and wherein an amide compound is formed in situ in the reaction mixture prior to isolating the coated semiconductor nanocrystals. In another embodiment, method for forming a coating comprising a semiconductor material on at least a portion of a population of semiconductor nanocrystals comprises providing a first mixture including semiconductor nanocrystals and a solvent, introducing an amide compound, one or more cation precursors and one or more anion precursors into the first mixture to form a reaction mixture for forming the semiconductor material, and reacting the precursors in the reaction mixture in the presence of the amide compound, under conditions sufficient to grow a coating comprising the semiconductor material on at least a portion of an outer surface of at least a portion of the semiconductor nanocrystals. Semiconductor nanocrystals including coatings grown in accordance with the above methods are also disclosed.

Method of fabricating rare-earth doped piezoelectric material with various amounts of dopants and a selected C-axis orientation

A method of fabricating a rare-earth element doped piezoelectric material having a first component, a second component and the rare-earth element. The method includes: providing a substrate; initially flowing hydrogen over the substrate; after the initially flowing of the hydrogen over the substrate, flowing the first component to form the rare-earth element doped piezoelectric material over a surface of a target, the target comprising the rare-earth metal in a certain atomic percentage; and sputtering the rare-earth element doped piezoelectric material from the target on the substrate.

Semiconductor device and method for fabricating the same
09679819 · 2017-06-13 · ·

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a first bump on the first region and a second bump on the second region; forming a first doped layer on the first fin-shaped structure and the first bump; and forming a second doped layer on the second fin-shaped structure and the second bump.

Methods for isolating portions of a loop of pitch-multiplied material and related structures
09666695 · 2017-05-30 · ·

Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of the loop. In some embodiments, loops of semiconductor material, having two legs connected together at their ends, are formed by a pitch multiplication process in which loops of spacers are formed on sidewalls of mandrels. The mandrels are removed and a block of masking material is overlaid on at least one end of the spacer loops. In some embodiments, the blocks of masking material overlay each end of the spacer loops. The pattern defined by the spacers and the blocks are transferred to a layer of semiconductor material. The blocks electrically connect together all the loops. A select gate is formed along each leg of the loops. The blocks serve as sources/drains. The select gates are biased in the off state to prevent current flow from the mid-portion of the loop's legs to the blocks, thereby electrically isolating the mid-portions from the ends of the loops and also electrically isolating different legs of a loop from each other.