According to one embodiment, a pattern formation method includes forming a base structure including first and second guide portions each including a pinning portion, and a neutral portion, forming a block copolymer film containing first and second polymers on the bass structure, performing a predetermined treatment for the block copolymer film, thereby forming first and second pattern portions formed of the first polymer, forming third and fourth pattern portions formed of the second polymer, and forming a fifth pattern portion formed of the first and second polymers. The fifth pattern portion includes a plurality of first portions formed of the second polymer, and a second portion formed of the first polymer and provided on the neutral portion and the first portions.

The present application relates to a block copolymer and uses thereof. The present application can provide a block copolymer—which exhibits an excellent self-assembling property and thus can be used effectively in a variety of applications—and uses thereof.

According to an embodiment, a wafer (W) includes a layer (EL) to be etched, an organic film (OL), an antireflection film (AL), and a mask (MK1), and a method (MT) according to an embodiment includes a step of performing an etching process on the antireflection film (AL) by using the mask (MK1) with plasma generated in a processing container (12), in the processing container (12) of a plasma processing apparatus (10) in which the wafer (W) is accommodated, and the step includes steps ST3a to ST4 of conformally forming a protective film (SX) on the surface of the mask (MK1), and steps ST6a to ST7 of etching the antireflection film (AL) by removing the antireflection film (AL) for each atomic layer by using the mask (MK1) on which the protective film (SX) is formed.

The present invention is configured to: form, on a substrate, a neutral layer having an intermediate affinity to a hydrophilic polymer and a hydrophobic polymer; form a resist pattern by performing exposure processing on a resist film formed on the neutral layer and then developing the resist film after the exposure processing; perform a surface treatment on the resist pattern by supplying an organic solvent having a polarity to the resist pattern; apply the block copolymer onto the neutral layer; and phase-separate the block copolymer on the neutral layer into the hydrophilic polymer and the hydrophobic polymer.

A thin film transistor, its manufacturing method, and a display device are provided. The method comprises: forming a gate metal layer (35), forming a step-like gate structure (352) by one patterning process; performing a first ion implantation procedure to forming a first heavily doped area (39a) and a second heavily doped area (39b), the first heavily doped area (39a) being separated apart from the second heavily doped area (39b) by a first length; forming a gate electrode (353) from the step-like gate structure (352); performing a second ion implantation procedure to form a first lightly doped area (38a) and a second lightly doped area (38b), the first lightly doped area (38a) being separated apart from the second lightly doped area (38b) by a second length less than the first length. By the above method, the process for manufacturing the LTPS TFT having the lightly doped source/drain structure can be simplified.

A method for manufacturing a thin film transistor substrate, the method can include a first mask process for forming a gate electrode on a substrate; a step for forming a gate insulating layer covering the gate electrode; a second mask process for forming a source electrode overlapping with one side of the gate electrode, and a drain electrode overlapping with other side of the gate electrode and being apart from the source electrode, on the gate insulating layer; and a third mask process for forming an oxide semiconductor layer extending from the source electrode to the drain electrode, and an etch stopper having the same shape and size with the oxide semiconductor layer on the oxide semiconductor layer.

An IC device manufacturing process effectuates a planar recessing of material that initially varies in height across a substrate. The method includes forming a polymer coating, CMP to form a planar surface, then plasma etching to effectuate a planar recessing of the polymer coating. The material can be recessed together with the polymer coating, or subsequently with the recessed polymer coating providing a mask. Any of the material above a certain height is removed. Structures that are substantially below that certain height can be protected from contamination and left intact. The polymer can be a photoresist. The polymer can be provided with suitable adhesion and uniformity for the CMP process through a two-step baking process and by exhausting the baking chamber from below the substrate.

Forming a semiconductor arrangement includes non-destructively determining a first spacer height of a first sidewall spacer adjacent a dummy gate and a second spacer height of a second sidewall spacer adjacent the dummy gate based upon a height of a photoresist as measured using optical critical dimension (OCD) spectroscopy. When the photoresist is sufficiently uniform, a hard mask etch is performed to remove a hard mask from the dummy gate and to remove portions of sidewall spacers of the dummy gate. A gate electrode is formed between the first sidewall spacer and the second sidewall spacer to form a substantially uniform gate. Controlling gate formation based upon photoresist height as measured by OCD spectroscopy provides a non-destructive manner of promoting uniformity.

The present invention makes it possible to improve the reliability of a semiconductor device. In a manufacturing method of a semiconductor device according to an embodiment, when a resist pattern is formed over a cap insulating film comprising a silicon nitride film, the resist pattern is formed through the processes of coating, exposure, and development treatment of a chemical amplification type resist. Then the chemical amplification type resist is applied so as to directly touch the surface of the cap insulating film comprising the silicon nitride film and organic acid pretreatment is applied to the surface of the cap insulating film comprising the silicon nitride film before the coating of the chemical amplification type resist.

The present disclosure provides a method for manufacturing a semiconductor structure. The method includes forming a photo-sensitive layer on a first surface of a semiconductor substrate. The photo-sensitive layer has a top surface. The method also includes obtaining a first profile of the first surface of the semiconductor substrate, and obtaining a second profile of the top surface of the photo-sensitive layer. The method also includes calculating a vertical displacement profile of the semiconductor substrate according to the first profile and the second profile. An apparatus for manufacturing a semiconductor structure is also disclosed.