A method of dispensing a fluid in a semiconductor manufacturing process includes providing a substrate, positioning a nozzle above the substrate, and determining a cross-sectional shape of the nozzle. The method also includes configuring the nozzle to have the determined cross-sectional shape and applying the fluid to the substrate through the nozzle with the determined cross-sectional shape.

The present disclosure discloses a FinFET transistor cut etching process method, comprising: step 1, forming a first photoresist pattern to define a cut etching region of the FinFET transistor; step 2, forming a second amorphous semiconductor pattern; step 3, forming a first dielectric layer and a first groove; step 4, forming a second dielectric layer that fully fills the first groove; step 5, performing CMP using the second amorphous semiconductor layer as a stop layer, so as to form a sidewall and a second dielectric layer strip; step 6, performing self-alignment to remove each side wall; step 7, performing a wet process to remove the amorphous semiconductor strip; and step 8: performing etching by using each second dielectric layer strip as a mask, so as to form a fin and achieve cut etching of the FinFET transistor. The present disclosure can enlarge the process window and reduce the process cost.

A semiconductor device and a method for forming the semiconductor device are provided. The method includes providing a substrate including an NMOS region and a PMOS region, forming an isolation layer on the substrate, forming initial hard mask layers on the isolation layer, and forming hard mask layers by removing a number of initial hard mask layers from the initial hard mask layers. The method also includes forming openings in the isolation layer in the NMOS region by removing portions of the isolation layer covered by the hard mask layers in the NMOS region, forming first fins in the openings in the isolation layer in the NMOS region, forming openings in the isolation layer in the PMOS region by removing portions of the isolation layer covered by the hard mask layers in the PMOS region, and forming second fins in the openings in the isolation layer in the PMOS region.

A method includes forming a resist pattern, the resist pattern having trenches oriented lengthwise along a first direction and separated by resist walls along both the first direction and a second direction perpendicular to the first direction. The method further includes loading the resist pattern into an ion implanter so that a top surface of the resist pattern faces an ion travel direction, and tilting the resist pattern so that the ion travel direction forms a tilt angle with respect to an axis perpendicular to the top surface of the resist pattern. The method further includes rotating the resist pattern around the axis to a first position; implanting ions into the resist walls with the resist pattern at the first position; rotating the resist pattern around the axis by 180 degrees to a second position; and implanting ions into the resist walls with the resist pattern at the second position.

This disclosure relates to a cleaning composition that contains 1) hydroxylamine; 2) a chelating agent; 3) an alkylene glycol; and 4) water. This disclosure also relates to a method of using the above composition for cleaning a semiconductor substrate.

A method of forming a semiconductor device structure includes forming a resist structure over a substrate, the resist structure includes an anti-reflective coating (ARC) layer and a photoresist layer over the ARC layer. The method further includes patterning the photoresist layer to form a trench therein. The method further includes performing a hydrogen plasma treatment to the patterned photoresist layer, wherein the hydrogen plasma treatment is configured to smooth sidewalls of the trench, and the hydrogen plasma treatment is performed at a temperature ranging from about 200° C. to about 600° C. The method further includes patterning the ARC layer using the patterned photoresist layer as a etch mask.

A composition for forming resist underlayer film for nanoimprinting includes novolac resin that has a repeating unit structure represented by formula (1). In formula (1), group A represents organic group having an aromatic ring, a condensed aromatic ring, or a condensed aromatic heterocycle, group B represents organic group having an aromatic ring or a condensed aromatic ring, group E represents a single bond or a branched or straight-chain C1-10 alkylene group that may be substituted and may include an ether bond and/or a carbonyl group, group D represents organic group that has 1 to 15 carbon atoms and is represented by formula (2) (in which R.sup.1, R.sup.2, and R.sup.3 each independently represent a fluorine atom, or a straight-chain, branched-chain, or cyclic alkyl group, and any two of R.sup.1, R.sup.2, and R.sup.3 may be bonded to one another to form a ring), and n represents a number from 1 to 5.

Semiconductor devices and methods of manufacture are provided whereby fences are formed over a substrate and III-V materials are grown over the substrate, wherein the fences block growth of the III-V materials. As such, smaller areas of the III-V materials are grown, thereby preventing stresses that occur with the growth of larger sheets.

A manufacturing method of a semiconductor structure includes at least the following steps. A patterned mask layer with a first opening is formed on a dielectric layer overlying a semiconductor substrate. A portion of the dielectric layer accessibly exposed by the first opening of the patterned mask layer is removed to form a second opening. A first protective film is formed on inner sidewalls of the dielectric layer and the patterned mask layer, where the second opening and the first protective film are formed at the same step. A second protective film is formed on the first protective film to form a protective structure covering the inner sidewalls. A portion of the semiconductor substrate accessibly exposed by the second opening is removed to form a via hole including an undercut underlying the protective structure. The via hole is trimmed and a through substrate via is formed in the via hole.

An apparatus for processing a substrate is provided. The apparatus includes a chamber having at least one gas inlet and at least one gas outlet, a substrate support in the chamber, a plasma generator and a controller configured to cause (a) placing a substrate on the substrate support, the substrate including a target layer having a recess, (b) exposing the substrate to a silicon-containing precursor, thereby forming an adsorption layer on a sidewall of the recess, (c) generating a plasma from a gas mixture in the chamber, the gas mixture including an oxygen-containing gas and a halogen-containing gas, (d) exposing the substrate to the plasma, thereby forming a protection layer on the adsorption layer while etching a bottom of the recess and (e) repeating (b) to (d) in sequence.