Patent classifications
H01L21/30
Methods for etching a structure for semiconductor applications
Embodiments of the present disclosure provide methods and apparatus for forming and patterning features in a film stack disposed on a substrate. In one embodiment, a method for patterning a conductive layer on a substrate includes supplying a gas mixture comprising a chlorine containing gas at a first flow rate to etch a first conductive layer disposed on the substrate, lowing the chlorine containing gas in the first gas mixture to a second flow rate lower than the first flow rate to continue etching the first conductive layer, and increasing the chlorine containing gas in the first gas mixture to a third flow rate greater than the second flow rate to remove the first conductive layer from the substrate.
EXPANDING MACHINE AND EXPANDING METHOD
An expanding machine for expanding a sheet having a workpiece bonded on the sheet. The expanding machine includes an expansion mechanism configured to expand the sheet, a cooling unit that cools the workpiece bonded on the sheet, and a temperature distribution detection unit that, before expanding the sheet by the expansion mechanism, detects a temperature distribution of the workpiece cooled by the cooling unit. A method for expanding a sheet having a workpiece bonded on the sheet is also disclosed.
METHODS FOR THE TREATMENT OF WORKPIECES
Systems and methods for thermal treatment of a workpiece are provided. In one example, a method for conducting a treatment process on a workpiece, such as a thermal treatment process, an annealing treatment process, an oxidizing treatment process, or a reducing treatment process in a processing apparatus is provided. The processing apparatus includes a plasma chamber and a processing chamber. The plasma chamber and the processing chamber are separated by a plurality of separation grids or grid plates. The separation grids or grid plates operable to filter ions generated in the plasma chamber. The processing chamber has a workpiece support operable to support a workpiece.
Micro-transfer printing with selective component removal
An example of a method of micro-transfer printing comprises providing a micro-transfer printable component source wafer, providing a stamp comprising a body and spaced-apart posts, and providing a light source for controllably irradiating each of the posts with light through the body. Each of the posts is contacted to a component to adhere the component thereto. The stamp with the adhered components is removed from the component source wafer. The selected posts are irradiated through the body with the light to detach selected components adhered to selected posts from the selected posts, leaving non-selected components adhered to non-selected posts. In some embodiments, using the stamp, the selected components are adhered to a provided destination substrate. In some embodiments, the selected components are discarded. An example micro-transfer printing system comprises a stamp comprising a body and spaced-apart posts and a light source for selectively irradiating each of the posts with light.
GENERATING MILLED STRUCTURAL ELEMENTS WITH A FLAT UPPER SURFACE
A miller, a non-transitory computer-readable medium, and a method for milling a multi-layered object. The method may include milling each structural element of an array of structural elements that are spaced apart from each other by gaps to provide the milled structural elements, wherein each milled structural element has a flat upper surface, wherein prior the milling each one of the structural elements of the array has a flat upper surface of a certain width, wherein the certain width is of a nanometric scale. The milling of each structural element of the array may include scanning a defocused ion beam of the certain width along a longitudinal axis of the structural element. A current intensity of the defocused ion beam decreases with a distance from a middle of the defocused ion beam.
Bottom and side plasma tuning having closed loop control
An apparatus for plasma processing a substrate is provided. The apparatus comprises a processing chamber, a substrate support disposed in the processing chamber, and a lid assembly coupled to the processing chamber. The lid assembly comprises a conductive gas distributor coupled to a power source. A tuning electrode may be disposed between the conductive gas distributor and the chamber body for adjusting a ground pathway of the plasma. A second tuning electrode may be coupled to the substrate support, and a bias electrode may also be coupled to the substrate support.
Bottom and side plasma tuning having closed loop control
An apparatus for plasma processing a substrate is provided. The apparatus comprises a processing chamber, a substrate support disposed in the processing chamber, and a lid assembly coupled to the processing chamber. The lid assembly comprises a conductive gas distributor coupled to a power source. A tuning electrode may be disposed between the conductive gas distributor and the chamber body for adjusting a ground pathway of the plasma. A second tuning electrode may be coupled to the substrate support, and a bias electrode may also be coupled to the substrate support.
Surface treatment of carbon containing films using organic radicals
Surface treatment processes for treating a workpiece with organic radicals are provided. In one example implementation, a method for processing a workpiece having a semiconductor material and a carbon containing layer (e.g., photoresist) can include a surface treatment process on the workpiece. The surface treatment process can include generating one or more species in a first chamber (e.g., a plasma chamber). The surface treatment process can include mixing one or more hydrocarbon radicals with the species to create a mixture. The surface treatment process can include exposing the carbon containing layer to the mixture in a second chamber (e.g., a processing chamber).
Method of manufacturing semiconductor devices
In a method, a structure including two or more materials having different coefficients of thermal expansion is prepared, and the structure is subjected to a cryogenic treatment. In one or more of the foregoing and following embodiments, the structure includes a semiconductor wafer and one or more layers are formed on the semiconductor wafer.
Surface treatment of silicon or silicon germanium surfaces using organic radicals
Processes for surface treatment of a workpiece are provided. In one example implementation, a method can include performing an organic radical based surface treatment process on a workpiece. The organic radical based surface treatment process can include generating one or more species in a first chamber. The surface treatment process can include mixing one or more hydrocarbon molecules with the species to create a mixture. The mixture can include one or more organic radicals. The surface treatment process can include exposing a semiconductor material on the workpiece to the mixture in a second chamber.