A semiconductor device, including a substrate having an insulating plate and a conductive plate formed on the insulating plate, a semiconductor chip formed on the conductive plate, a contact part arranged on the conductive plate with a bonding member therebetween, a rod-shaped external connection terminal having a lower end portion thereof fitted into the contact part, and a lid plate having a front surface and a back surface facing the substrate. An insertion hole pierces the lid plate, forming an entrance and exit respectively on the back and front surfaces of the lid plate. The external connection terminal is inserted in the insertion hole. The semiconductor device has at least one of a guide portion with an inclined surface, fixed to a portion of the external connection terminal located in the insertion hole, or an inclined inner wall of the insertion hole.

A semiconductor module arrangement includes an input stage including a first output terminal and a second output terminal, wherein a first inductive element is coupled to the first output terminal; an output stage including at least one first controllable semiconductor element, a third input terminal coupled to the first inductive element such that the first inductive element is coupled between the first output terminal and the third input terminal, a fourth input terminal coupled to the second output terminal, a third output terminal, and a fourth output terminal; a second controllable semiconductor element and a first capacitive element coupled in series and between a first common node coupled between the first inductive element and the third input terminal, and a second common node coupled between the second output terminal and the fourth input terminal; and a first diode element coupled in parallel to the second controllable semiconductor element.

A semiconductor device has a configuration in which a stacked assembly and a resin case are combined. The stacked assembly includes a semiconductor element, a stacked substrate on which the semiconductor element is mounted, and a metal substrate on which the stacked substrate is mounted. In the resin case, a notch groove is provided at a corner portion for reducing a stress. At least one of a width and a length of the notch groove is 2 mm or more.

A semiconductor device has a configuration in which a stacked assembly and a resin case are combined. The stacked assembly includes a semiconductor element, a stacked substrate on which the semiconductor element is mounted, and a metal substrate on which the stacked substrate is mounted. In the resin case, a notch groove is provided at a corner portion for reducing a stress. At least one of a width and a length of the notch groove is 2 mm or more.

A semiconductor package according to the present invention includes a metal plate, a metal base, provided on the metal plate, in which a through hole is formed, a metal block, provided in the through hole, a brazing material covering an upper surface of the metal block, a solder provided on the brazing material, a semiconductor device provided on the solder and a frame provided on the metal base, wherein the frame includes a ceramic part, a difference in thermal expansion coefficient between the metal base and the ceramic part is smaller than a difference in thermal expansion coefficient between the metal block and the ceramic part, the metal block is higher in thermal conductivity than the metal base, and an arithmetic average roughness of an upper surface of the brazing material is not more than a thickness of the solder.

A semiconductor device module may include a leadframe spacer that provides the functions of both a leadframe and a spacer, while enabling a double-sided cooling configuration. Such a leadframe spacer may include a leadframe surface that provides a die attach pad (DAP) that is shared by at least two semiconductor devices. The leadframe spacer may include at least one downset, where the semiconductor devices may be attached within a recess defined by the at least one downset. A first substrate may be connected to a first side of the leadframe. A second substrate may be connected to downset surfaces of the at least one downset, and positioned for further connection to the semiconductor devices in a double-sided assembly.

The object of the technique disclosed in the specification is to provide a technique in which the production cost is reduced without impairing the mechanical strength of the resin, and the heat radiation is improved. The semiconductor device relates to the technique disclosed in the specification includes an insulating substrate, a semiconductor element disposed on an upper surface of the insulating substrate, a case connected to the insulating substrate, such that the semiconductor element is accommodated inside thereof, and resin filled inside of the case, such that the semiconductor element is embedded, on the upper surface of the resin in the inside of the case, a first concave part is formed, the first concave part is formed at a position covering an entire of the semiconductor element in plan view.

The object of the technique disclosed in the specification is to provide a technique in which the production cost is reduced without impairing the mechanical strength of the resin, and the heat radiation is improved. The semiconductor device relates to the technique disclosed in the specification includes an insulating substrate, a semiconductor element disposed on an upper surface of the insulating substrate, a case connected to the insulating substrate, such that the semiconductor element is accommodated inside thereof, and resin filled inside of the case, such that the semiconductor element is embedded, on the upper surface of the resin in the inside of the case, a first concave part is formed, the first concave part is formed at a position covering an entire of the semiconductor element in plan view.

A semiconductor module arrangement includes a housing and at least one pair of semiconductor substrates arranged inside the housing. Each pair of semiconductor substrates includes first and second semiconductor substrates. The first semiconductor substrate includes a first dielectric insulation layer arranged between a first metallization layer and a third metallization layer, and a second dielectric insulation layer arranged between the third metallization layer and a second metallization layer. The second semiconductor substrate includes a first dielectric insulation layer arranged between a first metallization layer and a third metallization layer, and a second dielectric insulation layer arranged between the third metallization layer and a second metallization layer. The third metallization layer of the first semiconductor substrate is electrically coupled to a first electrical potential, and the third metallization layer of the second semiconductor substrate is electrically coupled to a second electrical potential that is opposite to the first electrical potential.

A semiconductor module arrangement includes a housing and at least one pair of semiconductor substrates arranged inside the housing. Each pair of semiconductor substrates includes first and second semiconductor substrates. The first semiconductor substrate includes a first dielectric insulation layer arranged between a first metallization layer and a third metallization layer, and a second dielectric insulation layer arranged between the third metallization layer and a second metallization layer. The second semiconductor substrate includes a first dielectric insulation layer arranged between a first metallization layer and a third metallization layer, and a second dielectric insulation layer arranged between the third metallization layer and a second metallization layer. The third metallization layer of the first semiconductor substrate is electrically coupled to a first electrical potential, and the third metallization layer of the second semiconductor substrate is electrically coupled to a second electrical potential that is opposite to the first electrical potential.