A semiconductor module includes: a first insulating plate; a second insulating plate is arranged above the first insulating plate; a first semiconductor device provided on an upper surface of the first insulating plate; a second semiconductor device provided on a lower surface of the second insulating plate; an insulating substrate including a third insulating plate arranged between the first insulating plate and the second insulating plate, and a conductor provided on the third insulating plate and connected to the first and second semiconductor devices; and sealing resin sealing the first and second semiconductor devices and the insulating substrate, wherein a withstand voltage of the third insulating plate is lower than withstand voltages of the first and second insulating plates.

A power module includes a power semiconductor device, a first power lead electrically connected to a first power terminal of the power semiconductor device, a second power lead disposed in parallel to the first power lead near the first power lead and electrically connected to a second power terminal of the power semiconductor device, and a conductive plate disposed to be spaced apart from the first power lead or the second power lead by a predetermined distance such that a region overlapping with the first power lead or the second power lead is formed.

A semiconductor device includes: a plurality of semiconductor elements connected in parallel; a rectifier element connected in anti-parallel to the plurality of semiconductor elements; a power terminal electrically connected to the plurality of semiconductor elements; and an electrical conductor electrically connected to the power terminal and the plurality of semiconductor elements and including a pad portion to which the plurality of semiconductor elements are bonded. The plurality of first semiconductor elements include a first element and a second element. The minimum conduction path of the first element to the power terminal is shorter than the minimum conduction path of the second element to the power terminal. The pad portion includes a first section to which the first element is bonded and a second section to which the second element is bonded. The rectifier element is located in the first section of the pad portion.

A semiconductor device includes: a plurality of semiconductor elements connected in parallel; a rectifier element connected in anti-parallel to the plurality of semiconductor elements; a power terminal electrically connected to the plurality of semiconductor elements; and an electrical conductor electrically connected to the power terminal and the plurality of semiconductor elements and including a pad portion to which the plurality of semiconductor elements are bonded. The plurality of first semiconductor elements include a first element and a second element. The minimum conduction path of the first element to the power terminal is shorter than the minimum conduction path of the second element to the power terminal. The pad portion includes a first section to which the first element is bonded and a second section to which the second element is bonded. The rectifier element is located in the first section of the pad portion.

A power conversion apparatus includes a semiconductor element, a plurality of lead frames, a flow-passage formation body, an insulating portion, a metal joining material, and a resin sealing portion. The plurality of lead frames are electrically connected to the semiconductor element. The flow-passage formation body forms a coolant flow passage in which a coolant flows. The insulating portion is arranged between the lead frame and the flow-passage formation body to provide insulation between the lead frame and the flow-passage formation body. The metal joining material joins the insulating portion and the flow-passage formation body. The resin sealing portion seals the semiconductor element and the lead frames. The semiconductor element and the lead frames are integrated with the flow-passage formation body to form a semiconductor cooling assembly by the resin sealing portion.

According to an embodiment, a semiconductor device includes a first electrically conductive portion, a first semiconductor chip of a reverse-conducting insulated gate bipolar transistor, a second electrically conductive portion, a third electrically conductive portion, a second semiconductor chip of an insulated gate bipolar transistor, and a fourth electrically conductive portion. The first semiconductor chip includes a first electrode and a second electrode. The first electrode is electrically connected to the first electrically conductive portion. The second electrically conductive portion is electrically connected to the second electrode. The third electrically conductive portion is electrically connected to the first electrically conductive portion. The second semiconductor chip includes a third electrode and a fourth electrode. The third electrode is electrically connected to the third electrically conductive portion. The fourth electrically conductive portion is electrically connected to the fourth electrode and the second electrically conductive portion.

A semiconductor device includes a semiconductor chip, first and second conductive members disposed on opposite sides of the semiconductor chip. The semiconductor chip includes a semiconductor substrate, a surface electrode and gate wirings. The semiconductor substrate has active regions formed with elements, and an inactive region not formed with an element. The inactive region includes an inter-inactive portion disposed between at least two active regions and an outer peripheral inactive portion disposed on an outer periphery of the at least two active regions. The surface electrode is disposed to continuously extend above the at least two active regions and the inter-inactive portion. The gate wirings are disposed above the inactive region, and include a first gate wiring disposed on an outer periphery of the surface electrode, and a second gate electrode disposed at a position facing the surface electrode.

A semiconductor module 1 according to one embodiment includes a first circuit board, circuit units and a first plate member; the circuit units include a second plate member, a vertical type transistor and a second circuit board; n first circuit unit of N circuit units electrically connect a back surface side conductive region to the first input interconnection pattern of the first circuit board; (N−n) second circuit unit of the N circuit units electrically connect the third conductive pattern and the fourth conductive pattern of the second circuit board to the first control interconnection pattern and the second input interconnection pattern of the first circuit board; the first plate member electrically connects the fourth conductive pattern of the first circuit units to the second plate member of the second circuit units; and the gate electrode pad of the vertical type transistor contained in the first circuit unit is electrically connected to the first control interconnection pattern of the first circuit board.

A semiconductor module 1 according to one embodiment includes a first circuit board, circuit units and a first plate member; the circuit units include a second plate member, a vertical type transistor and a second circuit board; n first circuit unit of N circuit units electrically connect a back surface side conductive region to the first input interconnection pattern of the first circuit board; (N−n) second circuit unit of the N circuit units electrically connect the third conductive pattern and the fourth conductive pattern of the second circuit board to the first control interconnection pattern and the second input interconnection pattern of the first circuit board; the first plate member electrically connects the fourth conductive pattern of the first circuit units to the second plate member of the second circuit units; and the gate electrode pad of the vertical type transistor contained in the first circuit unit is electrically connected to the first control interconnection pattern of the first circuit board.

Methods, systems, and apparatuses for a power card for use in a vehicle. The power card includes an N lead frame and a P lead frame, each having a body portion and a terminal portion. The power card includes an O lead frame having a body portion and a cooling portion. The power card includes a first power device located between the body portion of the N lead frame and the body portion of the O lead frame. The power card includes a second power device located between the body portion of the O lead frame and the body portion of the P lead frame, the O lead frame configured to receive heat from the first power device and the second power device by the body portion of the O lead frame and transfer the heat to the cooling portion of the O lead frame for heat dissipation.