An electronic device, comprising: a semiconductor body of silicon carbide; an insulating layer on a surface of the semiconductor body; a layer of metal material extending in part on the surface of the semiconductor body and in part on the insulating layer; a SiN interface layer on the layer of metal material and the insulating layer; a passivation layer on the interface layer; and an anchoring element that protrudes from the passivation layer towards the first insulating layer and extends in the first insulating layer underneath the interface layer.

A semiconductor device includes a silicon die having a first side and a second side, an adhesive layer attached to the first side of the silicon die, and a lead frame. The lead frame comprises a die attach pad having a mounting surface. The mounting surface has a smaller area than an area of the adhesive layer. The silicon die is mounted on the lead frame at the mounting surface so that edges of the silicon die and the adhesive layer overhang the die attach pad without touching the die attach pad. The semiconductor device further includes one or more leads that are spaced apart from the edges of the silicon die and the adhesive layer.

An integrated circuit (IC) package includes an interconnect comprising patches of unoxidized metal that are circumscribed by a region of roughened metal formed of oxidized metal. The IC package also includes a die mounted on the interconnect. The die is conductively coupled to at least a subset of the patches of unoxidized metal.

An electrical component package includes a glass substrate, an interposer panel positioned on the glass substrate, the interposer panel comprising a device cavity, a wafer positioned on the interposer panel such that the device cavity is enclosed by the glass substrate, the interposer panel, and the wafer. The electrical component package further includes a metal seed layer disposed between the interposer panel and the wafer, and a dielectric coating. The dielectric coating hermetically seals the interposer panel to the glass substrate, the interposer panel to the metal seed layer and the wafer, and the interposer panel hermetically seals the metal seed layer to the glass substrate such that the device cavity is hermetically sealed from ambient atmosphere.

Various implementations of a method of forming a semiconductor package may include forming a plurality of notches into the first side of a semiconductor substrate; applying a permanent coating material into the plurality of notches; forming a first organic material over the first side of the semiconductor substrate and the plurality of notches; thinning a second side of the semiconductor substrate opposite the first side one of to or into the plurality of notches; and singulating the semiconductor substrate through the permanent coating material into a plurality of semiconductor packages.

Implementations of a semiconductor device may include a semiconductor die including a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface; and one of a permanent die support structure, a temporary die support structure, or any combination thereof coupled to one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof where the semiconductor die may be coupled with one of a substrate, a leadframe, an interposer, a package, a bonding surface, or a mounting surface. The thickness may be between 0.1 microns and 125 microns.

A package comprising an electronic chip with at least one electric contact structure, an electrically conductive chip carrier having at least one coupling cavity, and a coupling structure located at least partially in the at least one coupling cavity and electrically contacting the at least one electric contact structure with the chip carrier.

A method of forming a semiconductor device includes the following operations: (i) receiving a precursor package including a precursor substrate and a plurality of semiconductor packages on the precursor substrate, in which a gap is presented between the precursor substrate and each of the semiconductor packages; (ii) forming underfill material filling the gaps; (iii) cutting the precursor substrate along a region between adjacent ones of the semiconductor packages to form a plurality of discrete package-on-package devices; and (iv) applying supplemental underfill material to one of the package-on-package devices.

A semiconductor package includes a substrate having at least one recessed portion, a semiconductor device located on a surface of the substrate, the surface having the at least one recessed portion, and a resin insulating layer covering the semiconductor device.

A semiconductor device comprises a substrate, a die mounted on the substrate, a reinforcement plate bonded to the die, and an adhesive layer coupling the reinforcement plate to the die.