Patent classifications
H01L23/3142
SEMICONDUCTOR MODULE
A semiconductor module includes: a semiconductor element; and a sealing member. The semiconductor element includes: a semiconductor substrate; a protection film on the semiconductor substrate; a metal film on the semiconductor substrate and having at least a part located between the semiconductor substrate and the protection film; and a dummy metal film on the semiconductor substrate between the metal film and the protection film. The surface of the semiconductor substrate has a recess. The protection film has an other recess or a hole. The dummy metal film is arranged in both the recess of the semiconductor substrate and the other recess or the hole of the protection film.
SEMICONDUCTOR MODULE INCLUDING A SEMICONDUCTOR PACKAGE CONNECTED TO A MODULE SUBSTRATE AND A BONDING WIRE
A semiconductor module includes a module substrate, a semiconductor package mounted on the module substrate, a first bonding wire connecting the module substrate to the semiconductor package, and a first molding member covering the first bonding wire. The semiconductor package includes a package substrate, a semiconductor chip mounted on the package substrate, a second bonding wire connecting the package substrate to the semiconductor chip, and a second molding member covering the semiconductor chip and the second bonding wire. The first and second bonding wires are each connected to one connection pad of the package substrate.
ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE ELECTRONIC DEVICE
An electronic component has a semiconductor element and a thermally conductive support member. A heat sink is disposed on one surface of the circuit body, and a thermally conductive insulating member is interposed between the heat sink and the support member. Input and output terminals and a ground terminal are also provided. A sealing resin is formed to expose a part of each of the input and output terminals and the ground terminal and one surface of the heat sink, and to cover a periphery of the electronic component structure. A main body conductor layer is formed to be insulated from the input and output terminals and cover an immersion region of the sealing resin and one surface of the heat sink immersed in a cooling medium. A ground conductor layer covers at least a part of the ground terminal and is electrically connected with the main body conductor layer.
METHOD AND APPRATUS FOR SEMICONDUCTOR PACKAGING
A method of forming a package includes providing a die, which includes a substrate having a circuit, a first passivation layer on the substrate, a plurality of pads on the first passivation layer, and a second passivation layer disposed on the first passivation layer and covering the plurality of pads. The method also includes forming one or more trenches by etching the second passivation layer that overlies a portion of the first passivation layer on the outside of the plurality of pads, and forming an organic polymer overlying the die after the one or more trenches are formed, thereby forming the package.
ELECTRONIC PACKAGE AND SUBSTRATE STRUCTURE THEREOF
A substrate structure is provided, which includes a substrate having a plurality of conductors and at least a receiving space formed on a surface of the substrate with the receiving space free from penetrating the substrate. During an encapsulating process, an encapsulant can be filled in the receiving space so as to strengthen the bonding between the substrate and the encapsulant, thereby preventing delamination from occurring therebetween.
Compression and cold weld sealing method for an electrical via connection
Compression cold welding methods, joint structures, and hermetically sealed containment devices are provided. The method includes providing a first substrate having at least one first joint structure which comprises a first joining surface, which surface comprises a first metal; providing a second substrate having at least one second joint structure which comprises a second joining surface, which surface comprises a second metal; and compressing together the at least one first joint structure and the at least one second joint structure to locally deform and shear the joining surfaces at one or more interfaces in an amount effective to form a metal-to-metal bond between the first metal and second metal of the joining surfaces. Overlaps at the joining surfaces are effective to displace surface contaminants and facilitate intimate contact between the joining surfaces without heat input. Hermetically sealed devices can contain drug formulations, biosensors, or MEMS devices.
Semiconductor packages and other circuit modules with porous and non-porous stabilizing layers
Integrated circuits (ICs 110) are attached to a wafer (120W). A stabilization layer (404) is formed over the wafer to strengthen the structure for further processing. Unlike a conventional mold compound, the stabilization layer is separated from at least some wafer areas around the ICs by one or more gap regions (450) to reduce the thermo-mechanical stress on the wafer and hence the wafer warpage. Alternatively or in addition, the stabilization layer can be a porous material having a low horizontal elastic modulus to reduce the wafer warpage, but having a high flexural modulus to reduce warpage and otherwise strengthen the structure for further processing. Other features and advantages are also provided.
Lead frame device
A lead frame device includes a metallic outer frame member, a lead frame package preform, and an encapsulant. The metallic outer frame member includes a pair of spaced apart longitudinal and transverse sections. The lead frame package preform includes at least one die pad surrounded by the metallic outer frame member such that a gap is formed around the die pad within the metallic, and a plurality of spaced apart leads. Each of the spaced apart leads has a first portion connected to the metallic outer frame member, a second portion proximal to and spaced apart from the die pad, a top surface, and a recess indented from the top surface. The encapsulant is filled in the recess. The disclosure also provides a lead frame device assembly.
CHIP PACKAGE AND METHOD OF FORMING A CHIP PACKAGE
In various embodiments, a chip package is provided. The chip package may include a chip comprising a chip metal surface, a metal contact structure electrically contacting the chip metal surface, a packaging material at least partially encapsulating the chip and the metal contact structure, and a chemical compound physically contacting the packaging material and at least one of the chip metal surface and the metal contact structure, wherein the chemical compound may be configured to improve an adhesion between the metal contact structure and the packaging material and/or between the chip metal surface and the packaging material, as compared with an adhesion in an arrangement without the chemical compound, wherein the chemical compound is essentially free from functional groups comprising sulfur, selenium or tellurium.
Power Module and Power Conversion Apparatus
An object of the present invention is to provide a power module that secures a heat dissipation route and has increased reliability. A power module of the present invention includes a first circuit body having a first semiconductor element and a first conductor portion, a second circuit body having a second semiconductor element and a second conductor portion, a resin sealing material for sealing the first circuit body and the second circuit body, and a warpage suppression portion that is formed along an array direction of the first circuit body and the second circuit body and is formed to have greater rigidity than a sealing portion of the resin sealing material, wherein the warpage suppression portion is formed of the same material as a resin member of the resin sealing material and is formed to be thicker than the sealing portion of the resin sealing material.