A lead frame includes a support portion that has one end on which a first part and a second part that has a smaller thickness than the first part are arranged, a lead, and a heat sink that is welded to the support portion in the second part. A method of manufacturing the lead frame includes forming, from a metal plate, a frame member that includes a support portion and a lead, where the support portion has one end on which a first part and a second part that has a smaller thickness than the first part are arranged, and welding a heat sink to the support portion in the second part.

In a general aspect, an electronic device assembly can include a dielectric substrate having a first surface and a second surface opposite the first surface and a leadframe including a first leadframe portion including a first plurality of signal leads, and a second leadframe portion including a second plurality of signal leads. The substrate can be coupled with a subset of the first plurality of signal leads and a subset of the second plurality of signal leads. Signal leads of the first plurality, other than the subset of the first plurality of signal leads, can be spaced from the dielectric substrate. Signal leads of the second plurality, other than the subset of the second plurality of signal leads, can be spaced from the dielectric substrate. The assembly can further include one or more semiconductor die that are electrically coupled with the substrate and the leadframe portions.

A device includes a relative temperature detector configured to determine a temperature difference between a device temperature sensed near a switch device and an ambient temperature sensed outside the switch device. The relative temperature detector is configured to generate a relative temperature output signal based on comparing the temperature difference to a relative temperature threshold. A power detector is configured to generate a power level signal based on comparing an indication of switch power of the switch device to a power threshold. The power level signal specifies whether the indication of switch power is above or below the power threshold. A thermal capacity control is configured to disable the switch device based on the power level signal specifying that the indication of switch power is above the power threshold and based on the relative temperature output signal indicating the temperature difference is above the relative temperature threshold.

Example embodiments relate to lead frame based molded radio frequency packages. One example package includes a substrate. The package also includes a first electrical component arranged on the substrate. Additionally, the package includes a second electrical component. Further, the package includes a plurality of leads that are arranged spaced apart from the substrate and fixed in position relative thereto by a solidified molding compound. The leads were part of a lead frame prior to separating the package from the lead frame. The substrate was physically and electrically connected to the lead frame using a plurality of spaced apart connecting members prior to separating the package from the lead frame. During the separating of the package from the lead frame, each connecting member was divided into a first connecting member part and a second connecting member part. In addition, the package includes a frame part.

A semiconductor package includes: a lead frame that includes a first surface and a second surface opposite to the first surface, where the lead frame includes a first lead that extends in a first direction, and a plurality of second leads that are spaced apart from the first lead on both sides of the first lead; at least one semiconductor chip mounted on the first surface of the lead frame by a plurality of bumps; and an encapsulant that encapsulates the lead frame and the at least one semiconductor chip, wherein the first lead has a groove in the first surface that partitions the plurality of bumps in contact with the first lead.

A semiconductor package includes a semiconductor die including terminals, a plurality of leads, at least some of the leads being electrically coupled to the terminals within the semiconductor package, a sensor on a surface of the semiconductor die, laser shielding forming a perimeter around the sensor on the surface of the semiconductor die, and a mold compound surrounding the semiconductor die except for an area inside the perimeter on the surface of the semiconductor die such that the sensor is exposed to an external environment.

There is provided a technique that includes: a lead having a main surface facing in a thickness direction; a semiconductor element mounted over the main surface; and a sealing resin that is in contact with the main surface and covers the semiconductor element, wherein the lead is formed with a plurality of grooves that are recessed from the main surface and are located apart from each other, and wherein the plurality of grooves are located away from a peripheral edge of the main surface.

A 3-D package structure for isolated power module is discussed. The package structure has metal trace in a support layer (e.g. a substrate board), which is covered by two magnetic films from both sides, thus an effective transformer is formed. An IC die which contains a voltage regulator is stacked above the support layer, which significantly reduces the package size.

This disclosure relates to a discrete cascode semiconductor device and associated method of manufacture, the device includes: a high voltage depletion mode device die having gate, source and drain terminals arranged on a first major surface thereof; a low voltage enhancement mode device die having a gate and a source terminal formed on a first major surface thereof, and a drain terminal formed on a second major surface opposite the first major surface. The drain terminal of the high voltage device die is mounted on a drain connection; the source terminal of the low voltage device die and the gate terminal of the high voltage device are mounted on a common source connection; and the drain terminal of the low voltage device die is mounted on the source terminal of the high voltage device.

Electronic packages and related methods are disclosed. An example electronic package apparatus includes a substrate and an electronic component. A protective material is positioned on a first surface, a second surface and all side surfaces of the electronic component to encase the electronic component. An enclosure is coupled to the substrate to cover the protective material and the electronic component.