A display device may include a substrate, a buffer layer on the substrate, a first active pattern on the buffer layer, the first active pattern having a first thickness, a second active pattern on the buffer layer spaced from the first active pattern and having a second thickness smaller than the first thickness, a first gate insulating layer on the first active pattern and the second active pattern, a first gate electrode on the first gate insulating layer, the first gate electrode overlapping the first active pattern, and a second gate electrode on the first gate insulating layer, the second gate electrode overlapping the second active pattern.

An array substrate, a method for manufacturing an array substrate, and a display panel are provided. The array substrate includes a substrate and a thin film transistor layer arranged on the substrate. The thin film transistor layer includes a plurality of thin film transistors. The thin film transistors each include an active layer, a source/drain, a first gate, a second gate, and a first insulating layer. The first gate and the second gate are electrically connected through the through hole. The problems of difficulty in etching and excessively long etching time are avoided while reducing the gate resistance of the thin film transistor.

In order to achieve the above-described technical benefits, according to an aspect of the present disclosure, a display device includes a stretchable lower substrate which includes an active area and a non-active area disposed at the outside of the active area; a pattern layer which is disposed on the lower substrate and includes a plurality of plate patterns and a plurality of line patterns; a plurality of pixels which is disposed above each of the plurality of plate patterns in the active area; and a plurality of connection lines which is disposed above the plurality of line patterns to connect the plurality of pixels, and the plurality of connection lines includes a high potential voltage line and a low potential voltage line which overlap each other in each of the plurality of plate patterns.

The present disclosure provides a wiring structure, a display substrate and a display device, and belongs to the field of display technology. The wiring structure of the present disclosure comprises a body portion provided with hollow patterns; the body portion has a first side and a second side which are provided opposite to each other along an extending direction of the wiring structure, and both the first and second sides are wavy; the body portion comprises a plurality of conductive elements sequentially connected along the extending direction of the wiring structure; and in each conductive element, a length of a protruding portion on the first side in the extending direction of the wiring structure is different from that of a protruding portion on the second side in the extending direction of the wiring structure.

A highly reliable semiconductor device is provided. A second insulating layer is positioned over a first insulating layer. A semiconductor layer is positioned between the first insulating layer and the second insulating layer. A third insulating layer is positioned over the second insulating layer. A fourth insulating layer is positioned over the third insulating layer. A first conductive layer includes a region overlapping with the semiconductor layer, and is positioned between the third insulating layer and the fourth insulating layer. The third insulating layer includes a region in contact with a bottom surface of the first conductive layer and a region in contact with the fourth insulating layer. The fourth insulating layer is in contact with a top surface and a side surface of the first conductive layer. A fifth insulating layer is in contact with a top surface and a side surface of the semiconductor layer. The fifth insulating layer includes a first opening and a second opening in a region overlapping with the semiconductor layer and not overlapping with the first conductive layer. A second conductive layer and a third conductive layer are electrically connected to the semiconductor layer in the first opening and the second opening, respectively. The third to fifth insulating layers include metal, and oxygen or nitrogen. A sixth insulating layer includes a region in contact with a top surface and a side surface of the fifth insulating layer and a region in contact with the first insulating layer.

An array substrate, a display panel, and a display device are disclosed. The array substrate includes a substrate and an array functional layer. The array substrate is provided with a through hole area including a through hole, a buffer area provided around the through hole area, and a display area provided around the buffer area. The buffer area includes part of the substrate and an inorganic film layer provided by the array functional layer. At least a groove is formed in the inorganic film layer around the through hole area, and the groove has a closed ring shape or a non-closed ring shape.

A driving circuit film configured to be bond at a periphery region of a display panel. The driving circuit film includes a flexible substrate, a gate driving circuit and a source driver. The gate driving circuit is disposed on the flexible substrate, and the gate driving circuit includes a Thin-Film Transistor. The source driver is disposed on the flexible substrate.

A display device includes a first light blocking layer disposed on a substrate, a second light blocking layer disposed on the substrate and spaced apart from the first light blocking layer, an active layer including a first area disposed on the first light blocking layer, a second area disposed on the substrate between the first light blocking layer and the second light blocking layer, and a third area disposed between the first area and the second area, a gate electrode disposed on the active layer and overlapping a portion of the first area, a first electrode disposed on the gate electrode, and including at least a portion overlapping the first light blocking layer, and a second electrode disposed on the gate electrode, and including at least a portion overlapping the second light blocking layer and at least another portion overlapping the third area of the active layer.

A display device includes a first base layer including a first opening; a first barrier layer located on a surface of the first base layer, and including a second opening; and a pad electrode located on the first barrier layer and overlapping the second opening in a plan view. At least one first groove is formed at a surface of the first barrier layer, a second groove is formed at a surface of the pad electrode, and the first opening exposes the at least one first groove and the second groove.

A display panel includes a first flexible substrate, and a metal wiring layer located on the first flexible substrate. The metal wiring layer includes at least one first power-supply line. At least one binding region is disposed on the side of the first flexible substrate away from the metal wiring layer. The display panel also includes a thin-film transistor layer, located on the side of the metal wiring layer away from the first flexible substrate and including a plurality of first thin-film transistors. Each first thin-film transistor includes a first electrode electrically connected to the first power-supply line. The display panel further includes a first conductive layer, including a plurality of conductive sections. The plurality of conductive sections is located in the binding region, and the first power-supply line is electrically connected to at least one conductive section of the plurality of conductive sections.