A thin film transistor includes an active layer on a substrate, a gate electrode configured to be spaced from the active layer and partially overlapped with the active layer, and a gate insulating layer, at least a part of the gate insulating layer being disposed between the active layer and the gate electrode, wherein the gate insulating layer includes a first gate insulating layer between the active layer and the gate electrode, and a second gate insulating layer configured to have a dielectric constant (k) which is different from a dielectric constant of the first gate insulating layer, and disposed in a same layer as the first gate insulating layer, and wherein at least a part of the second gate insulating layer is disposed between the active layer and the gate electrode.

A display device is disclosed, which includes: a substrate; a first transistor disposed on the substrate; and a second transistor disposed on the substrate. The first transistor includes: a first active layer; a first electrode and a second electrode electrically connecting to the first active layer; and a conducting layer at least partially covering one of the first electrode and the second electrode. The second transistor includes a second active layer. Herein, one of the first active layer and the second active layer includes a polysilicon layer, and the other one of the first active layer and the second active layer includes a metal oxide layer.

Embodiments of the present disclosure provide an array substrate including a base substrate, an active layer on the base substrate, a first gate insulating layer on the active layer, a first gate on the first gate insulating layer, and a second gate insulating layer on the first gate. The second gate insulating layer includes a first sub-insulating layer and a second sub-insulating layer disposed in a direction away from the active layer, and a hydrogen content of the first sub-insulating layer is larger than a hydrogen content of the second sub-insulating layer. A method for fabricating the array substrate and a display panel including the array substrate are also provided.

A display device includes a substrate, a transistor, a first insulating layer, a transfer pad, a second insulating layer, and a pixel electrode. The transistor is disposed on the substrate and includes a drain. The first insulating layer is disposed on the transistor and includes a first contact hole. The transfer pad is disposed on the first insulating layer and contacts the drain through the first contact hole. The transfer pad is filled into a bottom of the first contact hole to form a first contact region. The second insulating layer is disposed on the transfer pad and includes a second contact hole. A bottom of the second contact hole exposes part of the transfer pad to form a second contact region. The pixel electrode is disposed on the second insulating layer and contacts the transfer pad through the second contact hole.

A display panel and a display device are provided in the present disclosure. The display panel includes a base substrate, a first transistor, a second transistor, a pixel circuit, and a drive circuit. A first active layer of the first transistor includes silicon; and a second active layer of the second transistor includes an oxide semiconductor. A length of a channel region of the first transistor is LL a distance between a first gate electrode and the first active layer is D1, and a first area S1=L1×D1; and a length of a channel region of the second transistor is L2, a distance between a second gate electrode and the second active layer is D2, and a second area S2=L2×D2, where S1<S2. The second transistor is included in the drive circuit, and the first transistor is included in one of the pixel circuit and the drive circuit.

The present specification provides a display device and a driving method thereof performing sampling for sensing a sampling voltage of a driving transistor using a fast mode in which a driving transistor operates by a sampling voltage formed in one storage capacitor, and data writing using the slow mode in which the driving transistor is operated by a data voltage formed in another storage capacitor.

A thin film transistor includes an oxide semiconductor layer on a substrate, a gate insulating layer on the oxide semiconductor layer, a gate electrode on the gate insulating layer, which at least partially overlaps the oxide semiconductor layer, a interlayer insulating layer on the gate electrode, and a source electrode and a drain electrode on the interlayer insulating layer, the oxide semiconductor layer includes a channel portion which overlaps with the gate electrode and a connection portion which at least partially does not overlap the gate electrode, the source electrode and the drain electrode are in contact with the connection portion of the oxide semiconductor layer, the interlayer insulating layer is in contact with the connection portion of the oxide semiconductor layer, a hydrogen concentration of the connection portion is higher than a hydrogen concentration of the channel portion, and the interlayer insulating layer, the source electrode, and the drain electrode are in contact with the connection portion.

A display device is provided including a substrate. A second semiconductor layer is disposed on the substrate. The second semiconductor layer includes Si. A second gate lower electrode overlaps a channel region of the second semiconductor layer. A second gate insulating layer is disposed on the second gate lower electrode. A second gate upper electrode and a light blocking layer are disposed on the second gate insulating layer. A first auxiliary layer is disposed on the second gate upper electrode and the light blocking layer. A first semiconductor layer overlaps the light blocking layer. The first semiconductor layer includes an oxide semiconductor. A first gate electrode overlaps a channel region of the first semiconductor layer. The first auxiliary layer includes an insulating layer including at least one compound selected from SiNx, SiOx, and SiON, and at least one material selected from F, Cl, and C.

A method of manufacturing an array substrate includes: forming a first semiconductor pattern and a first insulating layer group sequentially on a base substrate; forming a second semiconductor pattern and a second insulating layer group sequentially on the first insulating layer group; forming two first via holes in the first insulating layer group and the second insulating layer group to expose the first semiconductor pattern, annealing the exposed first semiconductor pattern and then removing an oxide layer on a surface of the first semiconductor pattern; forming connecting wires in the first via holes; forming second via holes in the second insulating layer group to expose the second semiconductor pattern, and forming a first source electrode and a first drain electrode in the second via holes such that the first source electrode or the first drain electrode covers and is connected to one of the connecting wires.

There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.