A display device includes a substrate, a buffer layer disposed on the substrate, a first semiconductor layer disposed on the buffer layer and including an oxide semiconductor and a first active layer, a first gate insulating layer disposed on the first semiconductor layer and the buffer layer, a second semiconductor layer disposed on the first gate insulating layer and including an oxide semiconductor, a second active layer, and a first oxide layer on the first active layer, a second gate insulating layer disposed on the second semiconductor layer, a first conductive layer disposed on the second gate insulating layer, an insulating layer disposed on the first conductive layer, a second conductive layer disposed on the insulating layer, a passivation layer disposed on the second conductive layer, and a third conductive layer disposed on the first passivation layer.

A display device may include a substrate, a buffer layer on the substrate, a first active pattern on the buffer layer, the first active pattern having a first thickness, a second active pattern on the buffer layer spaced from the first active pattern and having a second thickness smaller than the first thickness, a first gate insulating layer on the first active pattern and the second active pattern, a first gate electrode on the first gate insulating layer, the first gate electrode overlapping the first active pattern, and a second gate electrode on the first gate insulating layer, the second gate electrode overlapping the second active pattern.

An image light generation device includes a first panel configured to emit a first image light including a blue wavelength region, a second panel configured to emit a second image light including a wavelength region different from the blue wavelength region, and a color combining prism configured to combine the first image light and the second image light. The first panel includes a plurality of first pixels, each of the plurality of first pixels includes a first light emitting element, and a first transistor provided corresponding to the first light emitting element, the second panel includes a plurality of second pixels, each of the plurality of second pixels includes a second light emitting element, and a second transistor provided corresponding to the second light emitting element, and a size of the first transistor is greater than a size of the second transistor.

A display device having a substrate; a first thin film transistor (TFT) on the substrate, the first TFT having a first active layer, a first gate insulator, and a first gate electrode; a second TFT on the substrate, the second TFT having a second active layer, a second gate insulator and a second gate electrode. The first gate insulator is disposed between the first gate electrode and the first active layer, and the first gate insulator is in contact with the first active layer. The second gate insulator is disposed between the second gate electrode and the second active layer, and the second gate insulator is in contact with the second active layer. The first active layer is a different material than the second active layer, and a hydrogen concentration of the second gate insulator is less than a hydrogen concentration of the first gate insulator.

An array substrate, a manufacturing method thereof, and display panel are provided. Gate scanning lines and Light-shielding conductive layer are electrically connected, so that a width of the gate scanning line is substantially unchanged from the conventional technology to ensure an aperture ratio of a display panel. Therefore, an impedance of the wire used to transmit the scanning electrical signal is reduced, so that the display panel driving power consumption is reduced to increase the corresponding speed of pixel charging and discharging.

An array substrate and a display panel are provided. The array substrate includes scanning lines, data lines, pixel electrodes disposed between the scanning lines and the data lines, and thin film transistors electrically connected to the scanning lines, data lines, and pixel electrodes. By disposing openings on positions of gate electrodes of the thin film transistors corresponding to drain electrodes, a problem of inconsistent parasitic capacitance between the gate electrodes and the drain electrodes of the thin film transistors due to position shifting of the drain electrodes of the thin film transistors can be solved, thereby improving display quality of the display panel using the array substrate.

A display device includes: a substrate; a buffer layer on the substrate; a first active pattern and a second active pattern on the buffer layer and spaced apart from each other; a first gate insulation layer on the first active pattern and the second active pattern; a first gate electrode and a second gate electrode on the first gate insulation layer, the first gate electrode and the second gate electrode respectively overlapping the first active pattern and the second active pattern; a second gate insulation layer on the first gate electrode and the second gate electrode; and a capacitor electrode on the second gate insulation layer, the capacitor electrode overlapping the first gate electrode, wherein a permittivity of the first gate insulation layer is greater than a permittivity of the buffer layer.

A display apparatus includes a base substrate, an active pattern disposed on the base substrate, a gate insulation layer disposed on the active pattern, a gate electrode disposed on the gate insulation layer and overlapping the active pattern, a first insulation layer disposed on the gate electrode and having a total amount of hydrogen of about 5 atomic percent (at. %) to about 30 at. %, and a source electrode and a drain electrode which are disposed on the first insulation layer and are electrically connected to the active pattern.

The present disclosure discloses a manufacturing method for an array substrate and an array substrate. The method includes: forming a gate electrode, a gate insulating layer, a semiconductor layer, a source drain electrode layer and a photoresist layer on a substrate; patterning the photoresist layer to form a patterned photoresist layer; performing at least one wet etching on the source drain electrode layer and performing at least one dry etching on the semiconductor layer; performing an ashing processing between the steps of the wet etching and the dry etching. A ratio of a lateral etching rate to a longitudinal etching rate in the at least one ashing processing ranges from 1:0.9 to 1:1.5.

An array substrate, a manufacturing method thereof and a display device are provided, the array substrate includes a first electrode, a second electrode and an insulating layer between the first electrode and the second electrode, the second electrode includes a plurality of electrode groups, and the electrode group includes electrode strips and an insulated passivation wall sandwiched between the electrode strips.