A display panel includes a base substrate. A semiconductor layer is disposed on the base substrate. A source electrode and a drain electrode are disposed on the semiconductor layer. A first insulating layer is disposed on both the source electrode and the drain electrode. A data line is disposed on the first insulating layer. The data line is electrically connected to the source electrode via a contact hole penetrating through the first insulating layer.

A display device includes a thin-film transistor layer disposed on a substrate and including thin-film transistors; and an emission material layer disposed on the thin-film transistor layer. The emission material layer includes light-emitting elements each including a first light-emitting electrode, an emissive layer and a second light-emitting electrode, light-receiving elements each including a first light-receiving electrode, a light-receiving semiconductor layer and a second light-receiving electrode, and a first bank disposed on the first light-emitting electrode and defining an emission area of each of the light-emitting elements. The light-receiving elements are disposed on the first bank.

A display apparatus includes a first semiconductor layer, a first gate insulating layer, a first conductive layer, an etch stop layer, a second gate insulating layer, a second conductive layer, a first interlayer insulating layer, a second semiconductor layer, a third gate insulating layer, a second interlayer insulating layer, and a first connection electrode layer that are sequentially stacked. The first connection electrode layer includes a first connection electrode contacting the first semiconductor layer via a contact hole defined in the first gate insulating layer, the etch stop layer, the second gate insulating layer, the first interlayer insulating layer, the third gate insulating layer, and the second interlayer insulating layer.

A LCD device having a large pixel holding capacitance includes opposedly facing first and second substrates, and liquid crystal between them. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode connected to the video signal line and a second electrode connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film above the first silicon nitride film, a capacitance electrode above the organic insulation film, and a second silicon nitride film above the capacitance electrode and below the pixel electrode. A contact hole etched in both the first and second silicon nitride films connects the second electrode and the pixel electrode to each other. A holding capacitance is formed by the pixel electrode, the second silicon nitride film and the capacitance electrode.

A method of manufacturing an array substrate is provided, which comprises: forming a first metal layer and an insulating layer in sequence on a base substrate, the insulating layer covering the first metal layer; forming an etch barrier layer on the insulating layer; etching the etching barrier layer and the insulating layer multiple times, wherein an effective blocking area of the etching barrier layer decreases successively in each etching to form a connection hole penetrating the insulating layer, the connection hole includes a plurality of via holes connected in sequence, and a slope angle of a hole wall of each via hole is smaller than a preset slope angle; and forming a second metal layer, the second metal layer being connected to the first metal layer through the connection hole.

The present disclosure provides a display panel and a display device. A through-hole is defined in a bending area of the display panel, and after the bending area is bent along a bending center line, the through-hole forms a light transmitting area, and the light transmitting area is disposed on a light path of an electronic component. Based on the light transmitting area formed after bending the through-hole, the electronic component can be disposed under the display panel, thereby achieving a narrow frame design.

An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

A display device includes a base substrate including a display area and a non-display area around the display area are defined, a first interlayer insulating layer disposed on the base substrate, a second interlayer insulating layer disposed on the first interlayer insulating layer, a first semiconductor layer disposed on the second interlayer insulating layer and including an oxide, and a first gate insulating layer disposed on the first semiconductor layer, wherein the material of the first interlayer insulating layer and the material of the second interlayer insulating layer are different from each other. Methods of manufacturing a display device are also disclosed.

A thin film transistor array substrate and a display device are provided. The thin film transistor array substrate includes a first semiconductor layer, a second semiconductor layer, a first gate electrode, a conductive layer, a second gate electrode, a third gate electrode, and an intermediate insulating layer. The first semiconductor layer and the second semiconductor layer are made of different semiconductor materials. The first gate electrode and the conductive layer overlap with the first semiconductor layer. The second gate electrode and the third gate electrode overlap with the second semiconductor layer. The intermediate insulating layer is disposed between the second semiconductor layer and the second gate electrode.

The present application discloses a display panel, an array substrate, and a manufacturing method thereof. The array substrate includes a substrate, a thin-film transistor layer, an insulating nanoparticle layer, and an organic polymer layer. The thin-film transistor layer is disposed on the substrate. The insulating nanoparticle layer is disposed on the substrate and covers the thin-film transistor layer. The organic polymer layer is stacked on a side of the insulating nanoparticle layer away from the thin-film transistor layer and covers the insulating nanoparticle layer.