The tunneling channel of a field effect transistor comprising a plurality of tunneling elements contacting a channel substrate. Applying a source-drain voltage of greater than a turn-on voltage produces a source-drain current of greater than about 10 pA. Applying a source-drain voltage of less than a turn-on voltage produces a source-drain current of less than about 10 pA. The turn-on voltage at room temperature is between about 0.1V and about 40V.

A method that includes: providing a substrate including a layer of a crystalline material having a first surface; and exposing the first surface to an environment under conditions sufficient to cause epitaxial growth of a layer of a deposition material on the first surface, wherein exposing the first surface to the environment includes illuminating the substrate with light at a first wavelength while causing the epitaxial growth of the layer of the deposition material. The first surface includes one or more discrete growth sites at which an epitaxial growth rate of the quantum confined nanostructure material is larger than areas of the first surface away from the growth sites by an amount sufficient so that the deposition material forms a quantum confined nanostructure at each of the one or more discrete growth sites.

The disclosure describes an adaptive and optimal imaging of individual quantum emitters within a lattice or optical field of view for quantum computing. Advanced image processing techniques are described to identify individual optically active quantum bits (qubits) with an imager. Images of individual and optically-resolved quantum emitters fluorescing as a lattice are decomposed and recognized based on fluorescence. Expected spatial distributions of the quantum emitters guides the processing, which uses adaptive fitting of peak distribution functions to determine the number of quantum emitters in real time. These techniques can be used for the loading process, where atoms or ions enter the trap one-by-one, for the identification of solid-state emitters, and for internal state-detection of the quantum emitters, where each emitter can be fluorescent or dark depending on its internal state. This latter application is relevant to efficient and fast detection of optically active qubits in quantum simulations and quantum computing.

Transistors and methods of forming the same include forming a fin that has an active layer between two sacrificial layers. Material from the two sacrificial layers is etched away in a region of the fin. A gate stack is formed around the active layer in the region. Source and drain regions are formed in contact with the active layer.

Provided is a logical operation element that performs logical operations on three or more inputs using a single unique device. The logical operation element 30 is provided with an electrode 5A and the other electrode 5B that are provided to have a nanogap, a metal nanoparticle 7 arranged between the electrode 5A and the other electrode 5B in insulated state, and a plurality of gate electrodes 5C, 5D, 11, 11A, 11B for adjusting a charge of the metal nanoparticle 7. Electric current that flows between the electrode 5A and the other electrode 5B is controlled in accordance with the voltage applied to three or more of the gate electrodes 5C, 5D, 11, 11A, 11B.

A silicon-based quantum dot device (1) is disclosed. The device comprises a substrate (8) and a layer (7) of silicon or silicon-germanium supported on the substrate which is configured to provide at least one quantum dot (5.sub.1, 5.sub.2: FIG. 5). The layer of silicon or silicon-germanium has a thickness of no more than ten monolayers. The layer of silicon or silicon-germanium may have a thickness of no more than eight or five monolayers.

There is provided a quantum heterostructure and related devices, as well as methods for manufacturing the same. The quantum heterostructure includes a stack of coextending GeSn buffer layers and each GeSn buffer layer has a different Sn content one from another. The quantum heterostructure also includes a quantum well extending over the stack of coextending GeSn buffer layers, the quantum well comprising a highly tensile-strained layer, the highly tensile-strained layer comprising at least one group IV element and having a strain greater than or equal to 1%. The quantum heterostructure is compatible with silicon-based processing, manufacturing, and technologies. The method includes changing a reactor temperature and varying a molar fraction of an Sn-based precursor to achieve a stack of coextending GeSn buffer layers, each having a different Sn composition, on a substrate provided inside the reactor chamber and forming the quantum well over the stack of coextending GeSn buffer layers.

Described are Zn.sub.xCd.sub.1-xS.sub.ySe.sub.1-y/ZnS.sub.zSe.sub.1-z core/shell nanocrystals, CdTe/CdS/ZnS core/shell/shell nanocrystals, optionally doped Zn(S,Se,Te) nano- and quantum wires, and SnS quantum sheets or ribbons, methods for making the same, and their use in biomedical and photonic applications, such as sensors for analytes in cells and preparation of field effect transistors.

This invention describes a field-effect transistor in which the channel is formed in an array of quantum dots. In one embodiment the quantum dots are cladded with a thin layer serving as an energy barrier. The quantum dot channel (QDC) may consist of one or more layers of cladded dots. These dots are realized on a single or polycrystalline substrate. When QDC FETs are realized on polycrystalline or nanocrystalline thin films they may yield higher mobility than in conventional nano- or microcrystalline thin films. These FETs can be used as thin film transistors (TFTs) in a variety of applications. In another embodiment QDC-FETs are combined with: (a) coupled quantum well SWS channels, (b) quantum dot gate 3-state like FETs, and (c) quantum dot gate nonvolatile memories.

A three-dimensional polycrystalline semiconductor material provides a major ingredient forming individual crystalline grains having a nominal maximum grain diameter less than or equal to 50 nm, and a minor ingredient forming boundaries between the individual crystalline grains.