H01L2221/6834

Vertical power semiconductor device, semiconductor wafer or bare-die arrangement, carrier, and method of manufacturing a vertical power semiconductor device

A vertical power semiconductor device is described. The vertical power semiconductor device includes a semiconductor body having a first main surface and a second main surface opposite to the first main surface. A thickness of the semiconductor body between the first main surface and the second main surface ranges from 40 μm to 200 μm. Active device elements are formed in the semiconductor body at the first main surface. Edge termination elements at least partly surround the active device elements at the first main surface. A diffusion region extends into the semiconductor body from the second main surface. A doping concentration profile of the diffusion region decreases from a peak concentration Ns at the second main surface to a concentration Ns/e, e being Euler's number, over a vertical distance ranging from 1 μm to 5 μm.

SEMICONDUCTOR STRUCTURE AND METHOD MANUFACTURING THE SAME

A semiconductor structure includes a first semiconductor device, a second semiconductor device, a connection device and a redistribution circuit structure. The first semiconductor device is bonded on the second semiconductor device. The connection device is bonded on the second semiconductor device and arranged aside of the first semiconductor device, wherein the connection device includes a first substrate and conductive vias penetrating through the first substrate and electrically connected to the second semiconductor device. The redistribution circuit structure is located over the second semiconductor device, wherein the first semiconductor device and the connection device are located between the redistribution circuit structure and the second semiconductor device. The redistribution circuit structure and the first semiconductor device are electrically connected to the second semiconductor device through the conductive vias of the connection device.

Method of Manufacturing and Passivating a Die
20220359258 · 2022-11-10 ·

In an embodiment, a method for manufacturing and passivating a die includes providing the die having an active frontside including a protrusion, the protrusion configured for electrically contacting the die, covering a portion of the protrusion by a passivation tape before applying a passivation layer, applying the passivation layer on all sides of the die including the frontside and its protrusion in one single process, except on the portion covered by the passivation tape and detaching the passivation tape from the covered portion of the protrusion after applying the passivation layer to expose the portion of the protrusion which forms an electrical contact area.

Heat Dissipation for Semiconductor Devices and Methods of Manufacture

Semiconductor devices having improved heat dissipation and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure; a front-side interconnect structure on a front-side of the first transistor structure, the front-side interconnect structure including front-side conductive lines; a backside interconnect structure on a backside of the first transistor structure, the backside interconnect structure including backside conductive lines, the backside conductive lines having line widths greater than line widths of the front-side conductive lines; and a first heat dissipation substrate coupled to the backside interconnect structure.

ELECTRONIC MODULE, MANUFACTURING METHOD THEREOF AND ELECTRONIC PACKAGE HAVING THE SAME

An electronic module is provided, in which a first metal layer, an insulating layer and a second metal layer are sequentially formed on side faces and a non-active face of an electronic component to serve as a capacitor structure, where the capacitor structure is exposed from an active face of the electronic component so that by directly forming the capacitor structure on the electronic component, a distance between the capacitor structure and the electronic component is minimized, such that the effect of suppressing impedance can be optimized.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

A semiconductor device includes an integrated circuit, first conductive features, second conductive features, a package structure, and an encapsulant. The integrated circuit has an active surface and a rear surface opposite to the active surface. The first conductive features surround the integrated circuit. The second conductive features are stacked on the first conductive features. The package structure is disposed on the second conductive features and the rear surface of the integrated circuit. The encapsulant laterally encapsulates the integrated circuit, the first conductive features, the second conductive features, and the package structure.

WAFER PROCESSING METHOD
20220359259 · 2022-11-10 ·

A wafer processing method includes a wafer accommodating step of accommodating a wafer in a vacuum chamber, a protective sheet disposing step of disposing a protective sheet on a front surface of the wafer, a decompression step of decompressing the inside of the vacuum chamber, after the wafer accommodating step and the protective sheet disposing step, a press-fitting step of pressing the protective sheet against a peripheral marginal area of the wafer in the vacuum chamber to press-fit the protective sheet to the peripheral marginal area, after the decompression step, and a conveying-out step of opening the vacuum chamber to atmosphere to bring the protective sheet into close contact with the front surface of the wafer by atmospheric pressure and conveying out the wafer, after the press-fitting step.

Mounting method and mounting device
11495571 · 2022-11-08 · ·

A mounting method is a method for mounting a diced semiconductor chip having a first face that is held on a carrier substrate and a second face that is an opposite face of the first face on a circuit board placed on a mounting table. The mounting method includes affixing the second face of the semiconductor chip to an adhesive sheet, removing the carrier substrate from the semiconductor chip, reducing an adhesive strength of the adhesive sheet, and mounting the semiconductor chip on the circuit board by holding a first face side of the semiconductor chip with a head to separate the semiconductor chip from the adhesive sheet, and joining a second face side of the semiconductor chip to the circuit board.

Thermoplastic temporary adhesive for silicon handler with infra-red laser wafer de-bonding

A bonding material including a phenoxy resin thermoplastic component, and a carbon black filler component. The carbon black filler component is present in an amount greater than 1 wt. %. The carbon black filler converts the phenoxy resin thermoplastic component from a material that transmits infra-red (IR) wavelengths to a material that absorbs a substantial portion of infra-red (IR) wavelengths.

METHOD OF PROCESSING PLATE-SHAPED WORKPIECE

A method of processing a plate-shaped workpiece includes a workpiece supporting step of placing the plate-shaped workpiece on a thermocompression sheet whose area is larger than that of the plate-shaped workpiece, heating the thermocompression sheet to pressure-bond the thermocompression sheet to the plate-shaped workpiece, and supporting the plate-shaped workpiece on only the thermocompression sheet, a processing step of processing the plate-shaped workpiece to divide the plate-shaped workpiece into a plurality of chips, and a pick-up step of picking up the chips from the thermocompression sheet.