The present invention relates to a method of forming a joint bonding together two solid objects and joints made by the method, where the joint is formed by a layer of a binary system which upon heat treatment forms a porous, coherent and continuous single solid-solution phase extending across a bonding layer of the joint.

The present invention relates to a method of forming a joint bonding together two solid objects and joints made by the method, where the joint is formed by a layer of a binary system which upon heat treatment forms a porous, coherent and continuous single solid-solution phase extending across a bonding layer of the joint.

A method includes forming a first tacking layer on a first connection partner, arranging a first layer on the first tacking layer, forming a second tacking layer on the first layer, arranging a second connection partner on the second tacking layer, heating the tacking layers and first layer, and pressing the first connection partner towards the second connection partner, with the first layer arranged between the connection partners, such that a permanent mechanical connection is formed between the connection partners. Either the tacking layers each include a second material evenly distributed within a first material, the second material being configured to act as or to release a reducing agent, or the tacking layers each include a mixture of at least a third material and a fourth material, the materials in the mixture chemically reacting with each other under the influence of heat such that a reducing agent is formed.

This invention relates to a method for bonding of a first contact surface of a first substrate to a second contact surface of a second substrate with the following steps, especially the following sequence: forming a first reservoir in a surface layer on the first contact surface and a second reservoir in a surface layer on the second contact surface, the surface layers of the first and second contact surfaces being comprised of respective native oxide materials of one or more second educts respectively contained in reaction layers of the first and second substrates, partially filling the first and second reservoirs with one or more first educts; and reacting the first educts filled in the first reservoir with the second educts contained in the reaction layer of the second substrate to at least partially strengthen a permanent bond formed between the first and second contact surfaces.

In a method of manufacturing a semiconductor device of one embodiment, support members and a film which is formed of a paste containing metal particles and surrounds the support members are provided above a surface of a base. Then a semiconductor element is provided above the support members and the film. Subsequently, the film is sintered to join the base and the semiconductor element. The support members are formed of a metal which melts at a temperature equal to or below a sintering temperature of the metal particles contained in the paste. The support members support the semiconductor element after the semiconductor element is provided above the support members and the film.

A production of voids between substrates is prevented when the substrates are bonded together, and the substrates are bonded together at a high positional precision while suppressing a strain. A method for bonding a first substrate and a second substrate includes a step of performing hydrophilization treatment to cause water or an OH containing substance to adhere to bonding surface of the first substrate and the bonding surface of the second substrate, a step of disposing the first substrate and the second substrate with the respective bonding surfaces facing each other, and bowing the first substrate in such a way that a central portion of the bonding surface protrudes toward the second substrate side relative to an outer circumferential portion of the bonding surface, a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate at the respective central portions, and a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate across the entirety of the bonding surfaces, decreasing a distance between the outer circumferential portion of the first substrate and an outer circumferential portion of the second substrate with the respective central portions abutting each other at a pressure that maintains a non-bonded condition.

A semiconductor wafer stack and a method of forming a semiconductor device is disclosed. The method includes providing a wafer stack with first and second wafers bonded together. The wafers include edge and non-edge regions, and at least one of the first and second wafers includes devices formed in the non-edge region. The first wafer serves as the base wafer while the second wafer serves as the top wafer of the wafer stack, where the base wafer is wider than the top wafer, providing a step edge of the wafer stack. An edge protection seal is formed on the wafer stack, where first and second layers are deposited on the wafer stack including at the top wafer and step edge of the wafer stack. The portion of the first and second layers on the step edge of the wafer stack forms the edge protection seal which protects the devices in the wafer stack in subsequent processing.

A semiconductor wafer stack and a method of forming a semiconductor device is disclosed. The method includes providing a wafer stack with first and second wafers bonded together. The wafers include edge and non-edge regions, and at least one of the first and second wafers includes devices formed in the non-edge region. The first wafer serves as the base wafer while the second wafer serves as the top wafer of the wafer stack, where the base wafer is wider than the top wafer, providing a step edge of the wafer stack. An edge protection seal is formed on the wafer stack, where first and second layers are deposited on the wafer stack including at the top wafer and step edge of the wafer stack. The portion of the first and second layers on the step edge of the wafer stack forms the edge protection seal which protects the devices in the wafer stack in subsequent processing.

Disclosed herein is an electrical connecting structure having nano-twins copper, including a first substrate having a first nano-twins copper layer and a second substrate having a second nano-twins copper layer. The first nano-twins copper layer includes a plurality of first nano-twins copper grains. The second nano-twins copper layer includes a plurality of second nano-twins copper grains. The first nano-twins copper layer is joined with the second nano-twins copper layer. At least a portion of the first nano-twins copper grains extend into the second nano-twins copper layer, or at least a portion of the second nano-twins copper grains extend into the first nano-twins copper layer.

A method of manufacturing a multi-layer wafer is provided. Under bump metallization (UMB) pads are created on each of two heterogeneous wafers. A conductive means is applied above the UMB pads on at least one of the two heterogeneous wafers. The two heterogeneous wafers are low temperature bonded to adhere the UMB pads together via the conductive means. At least one stress compensating polymer layer may be applied to at least one of two heterogeneous wafers. The stress compensating polymer layer has a polymer composition of a molecular weight polymethylmethacrylate polymer at a level of 10-50% with added liquid multifunctional acrylates forming the remaining 50-90% of the polymer composition.