A method for disassembling a stack of at least three substrates. The invention relates to the techniques for transferring thin films in the microelectronics field. It proposes a method for disassembling a stack of at least three substrates having between them two interfaces, one interface of which has an adhesion energy and an interface of which has an adhesion energy, with less than, the method comprising: 1) implementing a removal of material on the first substrate, in order to expose a surface of the second substrate, 2) transferring the stack onto a flexible adhesive film so that the surface has, with an adhesive layer of the film, an adhesion energy greater than, and 3) disassembling the third substrate at the interface between the second substrate and the third substrate. The method makes it possible to open the stack via the interface thereof with the highest adhesion energy.

Process for producing an electronic subassembly by low-temperature pressure sintering, comprising the following steps: arranging an electronic component on a circuit carrier having a conductor track, connecting the electronic component to the circuit carrier by the low-temperature pressure sintering of a joining material which connects the electronic component to the circuit carrier, characterized in that, to avoid the oxidation of the electronic component or of the conductor track, the low-temperature pressure sintering is carried out in a low-oxygen atmosphere having a relative oxygen content of 0.005 to 0.3%.

Disclosed herein is a method of forming an electrical connecting structure having nano-twins copper. The method includes the steps of (i) forming a first nano-twins copper layer including a plurality of nano-twins copper grains; (ii) forming a second nano-twins copper layer including a plurality of nano-twins copper grains; and (iii) joining a surface of the first nano-twins copper layer with a surface of the second nano-twins copper layer, such that at least a portion of the first nano-twins copper grains grow into the second nano-twins copper layer, or at least a portion of the second nano-twins copper grains grow into the first nano-twins copper layer. An electrical connecting structure having nano-twins copper is provided as well.

Methods for improved die bonding. In some embodiments, a method includes applying hot air to a die. The method also includes placing the die on a substrate after applying the hot air to the die. The method further includes waiting a predefined bonding period in order to establish a bond between the die and the substrate.

A method of manufacturing a semiconductor device which includes a plurality of members including a semiconductor element is provided. The method may include disposing one surface of a first member which is one of the plurality of members and one surface of a second member which is another one of the plurality of members opposite to each other with a tin-based (Sn-based) solder material interposed therebetween, and bonding the first member and the second member by melting and solidifying the Sn-based solder material. At least the one surface of the first member may be constituted of a nickel-based (Ni-based) metal, and at least the one surface of the second member may he constituted of copper (Cu).

The objective of the present invention is to provide a technique that ensures conduction between a gate terminal of a semiconductor switching element and a wiring layer in a semiconductor device formed with a wiring layer inside a ceramic layer. This semiconductor device comprises: a wiring layer that is inside a ceramic layer formed above an insulation layer; and a metal layer for connecting terminals from the semiconductor switching element other than the gate terminal. The wiring layer and the gate terminal from the semiconductor switching element are connected electrically via a connection part formed from a conductive material. The connection part protrudes more than the metal layer toward the semiconductor switching element.

A semiconductor device includes a metal chip mounting member and a semiconductor chip bonded to the chip mounting member through a metal sintered material, wherein the metal sintered material includes a first portion overlapping the semiconductor chip in a plan view, and includes a second portion surrounding the semiconductor chip in the plan view, and wherein a porosity ratio of the first portion is greater than or equal to 1% and less than 15%, and a porosity ratio of the second portion is greater than or equal to 15% and less than or equal to 50%.

Methods for improved die bonding. In some embodiments, a method includes applying hot air to a die. The method also includes placing the die on a substrate after applying the hot air to the die. The method further includes waiting a predefined bonding period in order to establish a bond between the die and the substrate.

A bonding method is provided. A sheet structure is placed on a substrate surface, and a surface roughness of a surface of the sheet structure is less than or equal to 1.0 micrometer. A carbon nanotube structure is laid on the surface of the sheet structure. Two ends of the carbon nanotube structure are in direct contact with the substrate surface. An organic solvent is added to the two ends of the carbon nanotube structure. An object is laid on the carbon nanotube structure, and a surface of the object being in direct contact with the carbon nanotube structure has a surface roughness less than or equal to 1.0 micrometer.

A bonding method is provided. A sheet structure is placed on a substrate surface, and a surface roughness of a surface of the sheet structure is less than or equal to 1.0 micrometer. A carbon nanotube structure is laid on the surface of the sheet structure. Two ends of the carbon nanotube structure are in direct contact with the substrate surface. An organic solvent is added to the two ends of the carbon nanotube structure. An object is laid on the carbon nanotube structure, and a surface of the object being in direct contact with the carbon nanotube structure has a surface roughness less than or equal to 1.0 micrometer.