A method of restricting a micro device on a conductive pad is provided. The method includes: forming the conductive pad having a first lateral length on a substrate; forming a liquid layer on the conductive pad; and placing the micro device having a second lateral length over the conductive pad such that the micro device is in contact with the liquid layer and is gripped by a capillary force produced by the liquid layer between the micro device and the conductive pad, the micro device comprising an electrode facing the conductive pad, wherein the first lateral length is less than or equal to twice of the second lateral length.

In an apparatus, effective pixels of CA-number composed of pixel rows of A-number and pixel columns of C-number or composed of the pixel rows of the C-number and the pixel columns of the A-number are arrayed in an effective pixel area of a chip, and images of a number not more than B-number are output from the chip for one second, wherein A, B and C are positive integers. The adhesive includes first, second, third, and fourth portions placed between a base body and the chip. The first and second portions are positioned between the third and fourth portions in the array direction of the pixel rows or columns. A gap is provided between the first and second portions, between the second and third portions, and between the first and fourth portions. The first and second portions are positioned between the effective pixel area and the base body.

A light-emitting device includes a carrier, a light-emitting element and a connection structure. The carrier includes a first electrical conduction portion. The light-emitting element includes a first light-emitting layer capable of emitting first light and a first contact electrode formed under the light-emitting layer. The first contact electrode is corresponded to the first electrical conduction portion. The connection structure includes a first electrical connection portion and a protective portion surrounding the first contact electrode and the first electrical connection portion. The first electrical connection portion includes an upper portion, a lower portion and a neck portion arranged between the upper portion and the lower portion. The lower portion has a width is wider than of the upper portion.

Provided is an optical semiconductor element in which an unbonded portion between an optical semiconductor chip and a submount is made small, heat dissipation efficiency becomes high, and service life can be made long. The optical semiconductor element can include: a submount; a submount electrode provided on a mounting surface of the submount and having a rectangular shape as a whole; and a semiconductor chip including an element substrate, a semiconductor structure layer formed on the element substrate, and a chip electrode bonded to the submount electrode via a bonding layer. The chip electrode has a shape with chipped corners corresponding to four corners of the submount electrode, which has an exposed surface that is a portion exposed from the chip electrode at the four corners and bonded to the chip electrode to coincide with each other. The bonding layer extends to all the four corners of the exposed surface.

A method of liquid assisted binding is provided. The method includes: forming a conductive pad on the substrate; placing a micro device on the conductive pad, such that the micro device is in contact with the conductive pad in which the micro device comprises an electrode facing the conductive pad; forming a liquid layer on the micro device and the substrate after said placing, such that a part of the liquid layer penetrates between the micro device and the conductive pad, and the micro device is gripped by a capillary force produced by said part of the liquid layer; and evaporating the liquid layer such that the electrode is bound to the conductive pad and is in electrical connection with the conductive pad.

This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with unwanted pads and the non-interfering area in the donor substrate is maximized. This enables to transfer the devices to receiver substrate with fewer steps.

A mounting method of an electronic device includes providing an electronic device which includes a semiconductor chip body including an upper surface, a lower surface opposite to the upper surface, and side surfaces connecting the upper surface and the lower surface, a plurality of bumps disposed on the lower surface, and an under-fill element disposed on at least one side surface. The method further includes mounting the electronic device on a printed circuit board including connecting pads formed thereon. The bumps of the semiconductor chip body are connected to the connecting pads. The method additionally includes heating the under-fill element to a predetermined temperature to form an under-fill layer between the lower surface of the semiconductor chip body and the printed circuit board.

A semiconductor device includes a carrier, a power semiconductor die that includes first and second opposite facing main surfaces, a side surface extending from the first main surface to the second main surface, and first and second electrodes disposed on the first and second main surfaces, respectively, a die attach material arranged between the carrier and the first electrode, wherein the die attach material forms a fillet at the side surface of the power semiconductor die, wherein a fillet height of the fillet is less than about 95% of a height of the power semiconductor die, wherein the height of the power semiconductor die is a length of the side surface, and wherein a maximum extension of the die attach material over edges of a main surface of the power semiconductor die facing the die attach material is less than about 200 micrometers.

A power die package includes a lead frame having a flag with power leads on one lateral side and signal leads on one or more other lateral sides. A power die is attached to a bottom surface of the flag and electrically connected to the power leads with a conductive epoxy. A control die is attached to a top surface of the flag and electrically connected to the signal leads with bond wires. A mold compound is provided that encapsulates the dies, the bond wires, and proximal parts of the leads, while distal ends of the leads are exposed, forming a PQFN package.

The invention is directed towards enhanced systems and methods for employing a pulsed photon (or EM energy) source, such as but not limited to a laser, to electrically couple, bond, and/or affix the electrical contacts of a semiconductor device to the electrical contacts of another semiconductor devices. Full or partial rows of LEDs are electrically coupled, bonded, and/or affixed to a backplane of a display device. The LEDs may be LEDs. The pulsed photon source is employed to irradiate the LEDs with scanning photon pulses. The EM radiation is absorbed by either the surfaces, bulk, substrate, the electrical contacts of the LED, and/or electrical contacts of the backplane to generate thermal energy that induces the bonding between the electrical contacts of the LEDs' electrical contacts and backplane's electrical contacts. The temporal and spatial profiles of the photon pulses, as well as a pulsing frequency and a scanning frequency of the photon source, are selected to control for adverse thermal effects.