A package includes an integrated circuit that includes at least one active area and at least one secondary device area, a support configured to support the integrated circuit, and a die attach material. The integrated circuit being mounted on the support using the die attach material and the die attach material including at least one channel configured to allow gases generated during curing of the die attach material to be released from the die attach material.

Provided is a semiconductor device capable of accurately positioning a semiconductor element with respect to a metal circuit pattern or positioning an insulating substrate with respect to a base plate without using a dedicated positioning jig, thereby being able to be manufactured inexpensively and a method of manufacturing the semiconductor device. The semiconductor device includes: an insulating substrate; and a semiconductor element, wherein the insulating substrate includes an insulating layer and a metal circuit pattern provided on an upper surface of the insulating layer, the semiconductor element is solder joined to an upper surface of the metal circuit pattern, and an oxide film or a nitride film is provided in a region where the semiconductor element is not solder joined in the upper surface of the metal circuit pattern.

Electrolyte for a solid-state battery includes a body having grains of inorganic material sintered to one another, where the grains include lithium. The body is thin, has little porosity by volume, and has high ionic conductivity.

Electrolyte for a solid-state battery includes a body having grains of inorganic material sintered to one another, where the grains include lithium. The body is thin, has little porosity by volume, and has high ionic conductivity.

A semiconductor device disclosed herein may include: a semiconductor element including an electrode on a surface of the semiconductor element; and a terminal bonded to the electrode via a bonding material, wherein the electrode may include a protrusion portion that protrudes toward the terminal and is in contact with the bonding material.

A semiconductor device according to embodiments includes a first base material having a first side surface, a first semiconductor chip provided above the first base material, a first insulating plate provided between the first base material and the first semiconductor chip, a first metal plate provided between the first insulating plate and the first semiconductor chip, a first bonding material provided between the first metal plate and the first semiconductor chip, the first bonding material bonding the first metal plate and the first semiconductor chip, a second bonding material provided between the first base material and the first insulating material, the second bonding material bonding the first base material and the first insulating plate, a second base material having a second side surface, a second semiconductor chip provided above the second base material, a second insulating plate provided between the second base material and the second semiconductor chip, a second metal plate provided between the second insulating plate and the second semiconductor chip, a third bonding material provided between the second metal plate and the second semiconductor chip, the third bonding material bonding the second metal plate and the second semiconductor chip, a fourth bonding material provided between the second base material and the second insulating plate, the fourth bonding material bonding the second base material and the second insulating plate, and a first base bonding portion provided between the second side surface and the first side surface and bonded to the first side surface and the second side surface.

A semiconductor device according to embodiments includes a first base material having a first side surface, a first semiconductor chip provided above the first base material, a first insulating plate provided between the first base material and the first semiconductor chip, a first metal plate provided between the first insulating plate and the first semiconductor chip, a first bonding material provided between the first metal plate and the first semiconductor chip, the first bonding material bonding the first metal plate and the first semiconductor chip, a second bonding material provided between the first base material and the first insulating material, the second bonding material bonding the first base material and the first insulating plate, a second base material having a second side surface, a second semiconductor chip provided above the second base material, a second insulating plate provided between the second base material and the second semiconductor chip, a second metal plate provided between the second insulating plate and the second semiconductor chip, a third bonding material provided between the second metal plate and the second semiconductor chip, the third bonding material bonding the second metal plate and the second semiconductor chip, a fourth bonding material provided between the second base material and the second insulating plate, the fourth bonding material bonding the second base material and the second insulating plate, and a first base bonding portion provided between the second side surface and the first side surface and bonded to the first side surface and the second side surface.

The semiconductor device includes: a heat spreader; a semiconductor element joined to the heat spreader via a first joining member; a first lead frame joined to the heat spreader via a second joining member; a second lead frame joined to the semiconductor element via a third joining member; and a mold resin. In a cross-sectional shape obtained by cutting at a plane perpendicular to a one-side surface of the heat spreader, an angle on the third joining member side out of two angles formed by a one-side surface of the semiconductor element and a straight line connecting an end point of a joining surface between the third joining member and the semiconductor element and an end point of a joining surface between the third joining member and the second lead frame, is not smaller than 90° and not larger than 135°.

A method of soldering elements together includes providing a substrate having a metal die attach surface, providing a semiconductor die that is configured as a power semiconductor device and having a semiconductor body, a rear side metallization, and a front side layer stack, the front side layer stack having a front side metallization and a contaminant protection layer, arranging the semiconductor die on the substrate with a region of solder material between the die attach surface and the rear side metallization, and performing a soldering process that reflows the region of solder material to form a soldered joint between the metal die attach surface and the rear side metallization, wherein the soldering process comprises applying mechanical pressure to the front side metallization, and wherein the contaminant protection layer is configured to prevent transmission of contaminants into the semiconductor body after the soldering process is completed.

In a method of manufacturing a semiconductor package, information with respect to a downward warpage of a reference package substrate, which may be bent with respect to a long axis and/or a short axis of the reference package substrate in applying heat to the reference package substrate to which a plurality of semiconductor chips may be attached using a die attach film (DAF), may be obtained. A package substrate, which may include a first surface to which the semiconductor chips may be attached using the DAF and a second surface opposite to the first surface, may be rotated with respect to the long axis or the short axis at an angle selected based on the information. The heat may be applied to the package substrate to cure the DAF and correct a warpage of the package substrate. Thus, warpage of the package substrate may be corrected for.