H01L2224/83948

Method of bonding semiconductor substrates

The disclosed technology generally relates to integrating semiconductor dies and more particularly to bonding semiconductor substrates. In an aspect, a method of bonding semiconductor substrates includes providing a first substrate and a second substrate. Each of the first substrate and the second substrate comprises a dielectric bonding layer comprising one or more a silicon carbon oxide (SiCO) layer, a silicon carbon nitride (SiCN) layer or a silicon carbide (SiC) layer. The method additionally includes, prior to bonding the first and second substrates, pre-treating each of the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate. Pre-treating includes a first plasma activation process in a plasma comprising an inert gas, a second plasma activation process in a plasma comprising oxygen, and a wet surface treatment including a water rinsing step or an exposure to a water-containing ambient. The method additionally includes bonding the first and the second substrates by contacting the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate to form a substrate assembly. The method further includes post-bond annealing the assembly.

Method of joining a surface-mount component to a substrate with solder that has been temporarily secured

A method of joining a surface-mount component to a substrate includes placing a piece of solder on top of the substrate and temporarily bonding the piece of solder to the substrate with at least one temporary bond. The method also includes placing a surface-mount component on top of the substrate with a bottom face of the surface-mount component facing the substrate. The surface-mount component has at least one lateral side. The method further includes positioning the surface-mount component with the at least one lateral side proximate the piece of solder, heating the substrate and the piece of solder to a joining temperature for a time sufficient for the solder to flow into an area between the bottom face of the surface-mount component and the substrate, and cooling the substrate and solder.

Method for producing soldered product

The present invention relates to a method for producing a soldered product by which soldering can be accomplished without using a jig. The method for producing a soldered product of the present invention comprises: a provision step of providing a solder and a temporary fixing agent for temporarily fixing the solder; a temporary fixing step of temporarily fixing the solder to a soldering target with the temporary fixing agent; a vaporization step of placing the soldering target with the solder temporarily fixed thereto in a vacuum or heating the soldering target with the solder temporarily fixed thereto to a predetermined temperature lower than the melting temperature of the solder, to vaporize the temporary fixing agent in order to form gaps between the solder and the soldering target; a reduction step, performed concurrently with or after the vaporization step, of reducing, with a reducing gas at a predetermined temperature lower than the melting temperature of the solder, the solder and the soldering target left in the vaporization step; and a solder melting step, performed after the reduction step, of heating the soldering target to a predetermined temperature equal to or higher than the melting temperature of the solder to melt the solder.

Die attach methods and semiconductor devices manufactured based on such methods

A method includes providing a carrier, depositing a die attach material on the carrier, and arranging a semiconductor die on the die attach material, wherein a main surface of the semiconductor die facing the die attach material at least partly contacts the die attach material, wherein immediately after arranging the semiconductor die on the die attach material, a first maximum extension of the die attach material over edges of the main surface is less than about 100 micrometers.

Implementing reworkable strain relief packaging structure for electronic component interconnects

A method and structure are provided for implementing enhanced reworkable strain relief packaging for electronic component interconnects. A plurality of custom strain relief pads is provided with a component footprint wiring layout on a component carrier or a component. The custom strain relief pads are disposed at component body perimeter locations. A solder mask is applied around these pad locations to provide a constrained area for a fusible surface coating. A fusible surface coating material is applied in the to the custom strain relief pads in the constrained area and then soldering of components is performed. Then a structural adhesive material is applied to the custom strain relief pad locations.

Power module and production method of the same

A power module and a production method of the same, wherein a metal substrate is connected with the connection substrate in a high temperature, and in a process of cooling from a high temperature to a low temperature, an upper surface and a lower surface of the metal substrate are bendingly deformed toward the connection substrate, and the upper surface of the metal substrate is formed as a curved surface protruding toward the connection substrate, then the lower surface of the metal substrate is processed into a plane. In the power module and the production method of the disclosure, the second bonding material between the metal substrate and the connection substrate has a larger edge thickness, which reduces the thermal stress that the edge of the second bonding material is subject to, thereby improving the reliability of the power module while the power module has good heat dissipation performance.

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first bonding layer formed below a first substrate, a first bonding via formed through the first oxide layer and the first bonding layer, a first dummy pad formed in the first bonding layer. The semiconductor structure includes a second semiconductor device. The second semiconductor device includes a second bonding layer formed over a second substrate, a second bonding via formed through the second bonding layer, and a second dummy pad formed in the second bonding layer. The semiconductor structure includes a bonding structure between the first substrate and the second substrate, wherein the bonding structure includes the first bonding via bonded to the second bonding via and the first dummy pad bonded to the second dummy pad.

Die tray with channels

Representative implementations of devices and techniques provide a device and a technique for processing integrated circuit (IC) dies. The device comprises a die tray (such as a pick and place tray, for example) for holding the dies during processing. The die tray may include an array of pockets sized to hold individual dies. The technique can include loading dies on the die tray, cleaning the top and bottom surfaces of the dies, and ashing and activating both surfaces of the dies while on the die tray, eliminating the need to turn the dies over during processing.

METHOD OF LIQUID ASSISTED BINDING
20200315028 · 2020-10-01 ·

A method of liquid assisted binding is provided. The method includes: forming a conductive pad on the substrate; placing a micro device on the conductive pad, such that the micro device is in contact with the conductive pad in which the micro device comprises an electrode facing the conductive pad; forming a liquid layer on the micro device and the substrate after said placing, such that a part of the liquid layer penetrates between the micro device and the conductive pad, and the micro device is gripped by a capillary force produced by said part of the liquid layer; and evaporating the liquid layer such that the electrode is bound to the conductive pad and is in electrical connection with the conductive pad.

METHOD OF RESTRICTING MICRO DEVICE ON CONDUCTIVE PAD
20200315029 · 2020-10-01 ·

A method of restricting a micro device on a conductive pad is provided. The method includes: forming the conductive pad having a first lateral length on a substrate; forming a liquid layer on the conductive pad; and placing the micro device having a second lateral length over the conductive pad such that the micro device is in contact with the liquid layer and is gripped by a capillary force produced by the liquid layer between the micro device and the conductive pad, the micro device comprising an electrode facing the conductive pad, wherein the first lateral length is less than or equal to twice of the second lateral length.