A semiconductor structure includes a semiconductor element and a first bonding structure. The semiconductor element has a first surface and a second surface opposite to the first surface. The first bonding structure is disposed adjacent to the first surface of the semiconductor element, and includes a first electrical connector, a first insulation layer surrounding the first electrical connector and a first conductive layer surrounding the first insulation layer.

The present disclosure relates to a full-color light-emitting diode (LED) display, and more particularly, to a full-color LED display using an ultra-thin LED element and a manufacturing method thereof.

Methods for bonding two wafers are disclosed. In one aspect, a first wafer includes an integrated circuit and the second wafer including a MEMS device. The method comprises depositing a bond pad on a metal on the first wafer and sequentially bonding the first wafer to the second wafer utilizing first and second temperatures. The second wafer is bonded to the bond pad at the first temperature and the bond pad and the metal are bonded at the second temperature. In another aspect, a first wafer including an integrated circuit, the second wafer includes a MEMS device. The method comprises depositing a bond pad on a metal on one of the first wafer and the second wafer and bonding the first wafer to the second wafer at a first temperature via a direct bond interface. The method includes bonding the bond pad to the metal at a second temperature.

An apparatus (100) including multiple biological chips (110,120) includes a substrate (101), a first adhesive layer (134) disposed on the substrate (101), a first biological chip (110) and a second biological chip (120) disposed on the first adhesive layer (134) and attached to the substrate (101) by the adhesive layer (134). The apparatus (100) further includes a filler (130) disposed between the first biological chip (110) and the second biological chip (120). The filler (130) includes a second adhesive layer (135) extending between a side surface (114) of the first biological chip (110) and a side surface (124) of the second biological chip (120), the second adhesive layer (135) attaching the first biological chip (110) to the second biological chip (120). The filler (130) also includes a surface layer (132) disposed over the second adhesive layer (135). The surface layer (132) has a hydrophobic surface that is co-planar with a top surface (111) of the first biological chip (110) and a top surface (121) of the second biological chip (120).

An electronic device which connects a circuit film to a display panel by applying a conductive material to the insides of holes formed in the circuit film, so as to improve reliability of bonding, and a display device using the same, are discussed.

Semiconductor package includes interposer, dies, encapsulant. Each die includes active surface, backside surface, side surfaces. Backside surface is opposite to active surface. Side surfaces join active surface to backside surface. Encapsulant includes first material and laterally wraps dies. Dies are electrically connected to interposer and disposed side by side on interposer with respective backside surfaces facing away from interposer. At least one die includes an outer corner. A rounded corner structure is formed at the outer corner. The rounded corner structure includes second material different from first material. The outer corner is formed by backside surface and a pair of adjacent side surfaces of the at least one die. The side surfaces of the pair have a common first edge. Each side surface of the pair does not face other dies and has a second edge in common with backside surface of the at least one die.

The invention relates to display device and method of manufacturing the same. The display device includes: a substrate; a driving pad disposed on the substrate; an insulating layer exposing the driving pad and disposed on the substrate; a circuit board including a circuit pad overlapping the driving pad; and a connector disposed between the circuit board and the insulating layer and including a plurality of conductive particles electrically connecting the driving pad and the circuit pad, the driving pad including: a first pad disposed on the substrate; and a second pad disposed on the first pad and having an opening exposing the first pad.

A chip module includes a chip having a front side and a rear side, a chip carrier having an upper side facing the chip, a contact layer formed of an electrically conductive material and arranged on the upper side of the chip carrier between the rear side of the chip and the upper side of the chip carrier, and an electrically conductive adhesive arranged on an upper side of the contact layer facing the chip. The electrically conductive adhesive connects the upper side of the contact layer and the rear side of the chip. The contact layer has a plurality of regions electrically insulated from each other and each electrically connected to the chip by the electrically conductive adhesive.

Some embodiments relate to a three-dimensional (3D) integrated circuit (IC). The 3D IC includes a first IC die comprising a first semiconductor substrate, and a first interconnect structure over the first semiconductor substrate. The 3D IC also includes a second IC die comprising a second semiconductor substrate, and a second interconnect structure that separates the second semiconductor substrate from the first interconnect structure. A seal ring structure separates the first interconnect structure from the second interconnect structure and perimetrically surrounds a gas reservoir between the first IC die and second IC die. The seal ring structure includes a sidewall gas-vent opening structure configured to allow gas to pass between the gas reservoir and an ambient environment surrounding the 3D IC.

Interconnecting a first chip and a second chip by a bridge member includes a chip handler for handling the first chip and the second chip. Each of the first chip and the second chip has a first surface including a first set of terminals and a second surface opposite to the first surface. The chip handler has an opening and at least one support surface for supporting the first surfaces of the first chip and the second chip when the first chip and the second chip are mounted to the chip handler. A chip support member supports the first chip and the second chip from the second surfaces, and a bridge handler is provided for inserting the bridge member through the opening of the chip handler and for placing the bridge member onto the first sets of terminals of the first chip and the second chip.