Patent classifications
H04B1/24
Radiofrequency transponder for a tire
A radiofrequency transponder includes a radiating antenna and an electronic device. The radiating antenna is a single-strand helical spring forming a dipole antenna. The electronic device includes an electronic chip and a primary antenna, which are encapsulated at least partially in a rigid, electrically insulating mass. The primary antenna is electromagnetically coupled to the radiating antenna.
Reception interface circuits supporting multiple communication standards and memory systems including the same
A reception interface circuit includes a termination circuit, a buffer and an interface controller. The termination circuit is configured to change a termination mode in response to a termination control signal. The buffer is configured to change a reception characteristic in response to a buffer control signal. The interface controller is configured to generate the termination control signal and the buffer control signal such that the reception characteristic of the buffer is changed in association with the change in the termination mode. The reception interface circuit may support various communication standards by changing the reception characteristic of the buffer in association with the termination mode. Using the reception interface circuit, communication efficiency of transceiver systems such as a memory system and/or compatibility between a transmitter device and a receiver device may be improved.
Reception interface circuits supporting multiple communication standards and memory systems including the same
A reception interface circuit includes a termination circuit, a buffer and an interface controller. The termination circuit is configured to change a termination mode in response to a termination control signal. The buffer is configured to change a reception characteristic in response to a buffer control signal. The interface controller is configured to generate the termination control signal and the buffer control signal such that the reception characteristic of the buffer is changed in association with the change in the termination mode. The reception interface circuit may support various communication standards by changing the reception characteristic of the buffer in association with the termination mode. Using the reception interface circuit, communication efficiency of transceiver systems such as a memory system and/or compatibility between a transmitter device and a receiver device may be improved.
Regenerative differential detector
A regenerative differential receiver includes, for example, a transformer arranged to receive a modulated differential signal. A first detector is arranged to source a first output current for indicating a first power level in response to falling voltage of a first line of the modulated differential signal. A second detector is arranged to sink a second output current for indicating a second power level in response to rising voltage of a first line of the modulated differential signal. A cross-coupled latch is arranged to latch a state in response to the first and second power levels. The cross-coupled latch provides, for example, weak non-linear regeneration for increasing receiver gain and maximum operating frequencies.
Regenerative differential detector
A regenerative differential receiver includes, for example, a transformer arranged to receive a modulated differential signal. A first detector is arranged to source a first output current for indicating a first power level in response to falling voltage of a first line of the modulated differential signal. A second detector is arranged to sink a second output current for indicating a second power level in response to rising voltage of a first line of the modulated differential signal. A cross-coupled latch is arranged to latch a state in response to the first and second power levels. The cross-coupled latch provides, for example, weak non-linear regeneration for increasing receiver gain and maximum operating frequencies.
5G MILLIMETER WAVE DUAL-BAND DUAL-MODE MIXER AND WIRELESS COMMUNICATION TERMINAL
This invention, falling into the field of radio communication technology, discloses 5G millimeter wave dual-band dual-mode mixer and wireless communication terminal. In the said 5G millimeter wave dual-band dual-mode mixer, the first MOSFET is connected to the source of the second MOSFET and the third MOSFET through its drain, with the first MOSFET connected to the drain of the fourth MOSFET through its drain. The second MOSFET is connected to one end of the first capacitor through its gate, with the other end of the first capacitor connected to the drain of the third MOSFET. The third MOSFET is connected to one end of the second capacitor through its gate and the other end of the second capacitor is connected to the drain of the second MOSFET.
5G MILLIMETER WAVE DUAL-BAND DUAL-MODE MIXER AND WIRELESS COMMUNICATION TERMINAL
This invention, falling into the field of radio communication technology, discloses 5G millimeter wave dual-band dual-mode mixer and wireless communication terminal. In the said 5G millimeter wave dual-band dual-mode mixer, the first MOSFET is connected to the source of the second MOSFET and the third MOSFET through its drain, with the first MOSFET connected to the drain of the fourth MOSFET through its drain. The second MOSFET is connected to one end of the first capacitor through its gate, with the other end of the first capacitor connected to the drain of the third MOSFET. The third MOSFET is connected to one end of the second capacitor through its gate and the other end of the second capacitor is connected to the drain of the second MOSFET.
METHOD AND APPARATUS FOR INCREASING RFID READ RANGE IN DAISY CHAIN CONFIGURATION
A repeating switch antenna comprising a transmission signal amplifier configured to amplify a transmission signal based on a power control signal, a first coupler configured to receive (i) the amplified transmission signal, (ii) a reception signal, and (iii) a load impedance, a noise cancelation circuit configured to generate the load impedance based on an in-phase channel input and a quadrature channel input, a digital acquisition system configured to (i) generate the power control signal, (ii) generate the in-phase channel input and the quadrature channel input, and (iii) generate a select signal, reception signal amplifier configured to receive the reception signal from the first coupler and amplify the reception signal, and a radio frequency (RF) switch configured to (i) route the amplified transmission signal from the first coupler to the RF connector or to an antenna based on the select signal, and (ii) route the reception signal to the first coupler.
Method and security module for receiving two signals
A method for producing an output bit stream for a first signal of a first carrier frequency by a security module involves the security module receiving an input signal comprising the first signal and a second signal of a second carrier frequency. A mixed signal is formed which has the first signal at the first carrier frequency, the second signal at the second carrier frequency, and a mixed product at an intermediate frequency. The mixed product is demodulated by a second nonlinear component to output a second baseband signal for generating a second bit stream relating to the first signal in the mixed product. The output logic produces the output bit stream for the first signal, and selects either the first bit stream or the second bit stream as the output bit stream for the first signal.
SIGNAL DETECTOR
A signal, in particular radio-frequency signal, detector (10), such as a detector of wake-up radio type has a first circuit (20) receiving at its input the signal, configured to set the operating point (M) at the output to a predefined DC voltage (Vm_DC) to which a variable part (Vm) which is dependent on the signal from the input is added. A second circuit (30) is connected at its input to the output of the first circuit (20) and configured to amplify the variable part (Vm) of the signal, this second circuit has a chain of at least two logic inverters (32) in a cascade and operating below the threshold.