A method of manufacturing a circuit board having waveguides including forming a waveguiding structure by injection molding. The waveguiding structure includes a plurality of waveguides arranged at intervals and at least one connecting portion connecting two adjacent waveguides. Each waveguide includes a waveguiding substrate and at least one protrusion on the waveguiding substrate. The connecting portion is removed to obtain at least two waveguides. A metal layer is formed to wrap the whole outer surface of each waveguide. A plurality of receiving grooves is formed to penetrate a wiring board. Each waveguide wrapped by the metal layer is embedded in one of the receiving grooves. The waveguides and the wiring board are fixed. A portion of the metal layer on a surface of each protrusion facing away from the waveguiding substrate is removed. A circuit board is also provided.

A printed circuit board (‘PCB’) including a substrate integrated waveguide (‘SIW’) formed using two ground planes representing the top and bottom walls of the waveguide, tightly pitched ground vias to act as two side walls and two back walls, and a pair of monopole antennas placed at each end of the SIW acting as signal feeding/receiving structures is disclosed. The waveguide dominant mode cut off frequency is determined by the spacing between the two side walls. Within each monopole antenna pair, the first monopole antenna operates at a first frequency while the second monopole antenna operates at another frequency. For each monopole antenna pair, the first monopole antenna and the second monopole antenna are located in the SIW at a distance from the back wall optimal for each operating frequency.

A printed wiring board is provided with: a core substrate corresponding to a stack area in which an interlayer connection conductor constituting an inner via is continuous; and a build-up layer comprising a resin layer stacked on the core substrate and a conductor layer on said resin layer. A via inner space inside the interlayer connection conductor constituting the inner via is hollow, and said via inner space communicates to the outside via a hole section provided in the build-up layer.

The present application discloses a filtering cable, which solves the problem that the cable in the related art cannot ensure a simple and reasonable structural design while having good filter performance. One or several core wires and N defective conductor layers surrounding the core wires are sequentially provided from inside to outside in the cross section in the radial direction of the filtering cable; wherein the defective conductor layer has an etching pattern; the etching pattern is distributed in the axial direction of the filtering cable; the etching pattern is used to make the filtering cable equivalent to a preset filter circuit to filter the signal transmitted in the filtering cable.

An integrated circuit package comprising an encapsulant, a semiconductor die in the encapsulant the semiconductor die comprising a plurality of die terminals, an integrated waveguide launcher, wherein the integrated waveguide launcher is connected to one of the die terminals and a land grid array provided on a bottom surface of the package. The land grid array comprises a plurality of package terminals, each package terminal configured to be soldered to a printed circuit board, and an opening, wherein the opening is aligned with the integrated waveguide launcher.

A method of manufacturing a device is provided. The method includes forming a first cavity in a first substrate with the first cavity having a first depth. A second cavity is formed in a second substrate with the second cavity having a second depth. The first cavity and the second cavity are aligned with each other. The first substrate is affixed to the second substrate to form a waveguide substrate having a hollow waveguide with a first dimension substantially equal to the first depth plus the second depth. A conductive layer is formed on the sidewalls of the hollow waveguide. The waveguide substrate is placed over a packaged semiconductor device, the hollow waveguide aligned with a launcher of the packaged semiconductor device.

A method for producing a waveguide in a multilayer substrate involves producing at least one cutout corresponding to a lateral course of the waveguide in a surface of a first layer arrangement comprising one or a plurality of layers. A metallization is produced on surfaces of the cutout. A second layer arrangement comprising one or a plurality of layers is applied on the first layer arrangement. The second layer arrangement comprises, on a surface thereof, a metallization which, after the second layer arrangement has been applied on the first layer arrangement, is arranged above the cutout and together with the metallization on the surfaces of the cutout forms the waveguide.

Waveguide assemblies are described that utilize a surface-mount waveguide for vertical transitions of a printed circuit board (PCB). The surface-mount waveguide enables low transmission-loss (e.g., increased return-loss bandwidth) by utilizing a waveguide cavity positioned over a plated slot to efficiently transfer electromagnetic energy from one side of the PCB to another side. The waveguide cavity is designed to excite two resonant peaks of the EM energy to reduce a return-loss of power and increase power delivered to an antenna while supporting a high bandwidth of EM energy. Furthermore, the surface-mount waveguide does not require precise fabrication often required for vertical transitions, allowing the surface-mount waveguide to be compatible with low-cost PCB materials (e.g., hybrid PCB stack-ups).

A component carrier with a first stack and a second stack. The first stack includes at least one first electrically insulating layer structure and at least one first electrically conductive layer structure having a first connection body with a first exposed planar electrically conductive surface. The second stack includes at least one second electrically insulating layer structure and at least one second electrically conductive layer structure having a second connection body with a second exposed planar electrically conductive surface. The first stack and the second stack are connected with each other so that the first exposed planar electrically conductive surface and the second exposed planar electrically conductive surface are connected to establish a vertical two-dimensional electrically conductive connection.

System, apparatuses and methods are disclosed which relate to the use of substrate integrated waveguide technology in front-end modules. An example circuit card assembly for use as a cellular base station front-end is disclosed which includes at least one component printed circuit board (PCB) layer having front-end module hardware components and at least one filter PCB layer including at least one substrate integrated waveguide (SIW) filter.