Patent classifications
H10K10/484
Semiconductor devices
A technique, comprising: forming in situ on a support substrate: a first metal layer; a light-absorbing layer after the first metal layer; a conductor pattern after the light-absorbing layer; and a semiconductor layer after the conductor pattern; patterning the semiconductor layer using a resist mask to form a semiconductor pattern defining one or more semiconductor channels of one or more semiconductor devices; and patterning the light-absorbing layer using the resist mask and the conductor pattern, so as to selectively retain the light-absorbing layer in regions that are occupied by at least one of the resist mask and the conductor pattern.
Condensed Polycyclic Aromatic Compound
A fused polycyclic aromatic compound represented by formula (1) is provided. In formula (1), one of R.sub.1 and R.sub.2 is a substituent group represented by general formula (2). In formula (2), n is from 0 to 2, R.sub.3 and R.sub.4 each independently represent a divalent linking group obtained by removing two hydrogen atoms from an aromatic hydrocarbon compound or a divalent linking group obtained by removing two hydrogen atoms from a 6-membered or more heterocyclic compound containing a nitrogen atom, an oxygen atom or a sulfur atom, with a plurality of R.sub.4 groups able to be the same as or different from each other when n is 2, and R.sub.5 represents a residue obtained by removing one hydrogen atom from an aromatic hydrocarbon compound or a residue obtained by removing one hydrogen atom from a 6-membered or more heterocyclic compound containing a nitrogen atom, an oxygen atom or a sulfur atom.
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OPTICAL-SENSING DEVICE, MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL
The present disclosure provides an optical-sensing device, a manufacturing method thereof, and a display panel. The optical-sensing device includes a sensor TFT disposed on a substrate and a switch TFT connected with the sensor TFT. The sensor TFT and the switch TFT include a first active layer and a second active layer, the first active layer comprises a first IGZO layer and a perovskite layer disposed on the first IGZO layer, and the second active layer comprises a second IGZO layer.
Indane derivatives and their use in organic electronics
The present invention relates to indane derivatives of the formula (I) and mixtures thereof, wherein X is selected from groups of the formula -A-(NAr.sub.2), wherein A is a chemical bond or phenylene which is unsubstituted or substituted by 1, 2 or 3 substituents selected from C.sub.1-C.sub.6-alkyl and C.sub.1-C.sub.6-alkoxy; Ar is unsubstituted or substituted aryl, wherein two groups Ar bound to the same nitrogen atom may together with the nitrogen atom also form a fused ring system having 3 or more than 3 unsubstituted or substituted rings; and the variables Y, n, m, k and l are as defined in the claims and the description. The invention further relates to methods for preparing such compounds and their use in organic electronics, in particular as hole transport material or electron blocking material. ##STR00001##
Van der Waals integration approach for material integration and device fabrication
An electronic or optoelectronic device includes: (1) a layer of a first material; and (2) a layer of a second material disposed on the layer of the first material, wherein the first material is different from the second material, and the layer of the first material is spaced from the layer of the second material by a gap.
VERTICAL ORGANIC ELECTROCHEMICAL TRANSISTOR PAIRS
Cofacial vertical organic electrochemical transistor (vOECT) pairs, electronic circuits into which the vOECT pairs are integrated, and methods for fabricating the vOECT pairs are provided. The vOECTs pairs are formed from a vertically stacked structure that includes a first layer of an electrically conducting material, a first layer of an electrically insulating material, and a second layer of an electrically conducting material. The vOECTs of the pairs are formed on opposing sidewalls of a trench formed in the stacked structure.
Photonic synapse based on graphene-perovskite quantum dot for neuromorphic computing
A phototransistor device to act as an artificial photonic synapse includes a substrate and a graphene source-drain channel patterned on the substrate. A perovskite quantum dot layer is formed on the graphene source-drain channel. The perovskite quantum dot layer is methylammonium lead bromide material. A method of operating the phototransistor device as an artificial photonic synapse includes applying a first fixed voltage to a gate of the phototransistor and a second fixed voltage across the graphene source-drain channel. A presynaptic signal is applied as stimuli across the graphene source-drain channel. The presynaptic signal includes one or more pulses of light or electrical voltage. A current across the graphene source-drain channel is measured to represent a postsynaptic signal.
Pentacene organic field-effect transistor with n-type semiconductor interlayer and its application
A method for enhancing the performance of pentacene organic field-effect transistor (OFET) using n-type semiconductor interlayer: an n-type semiconductor thin film was set between the insulating layer and the polymer electret in the OFET with the structure of gate-electrode/insulating layer/polymer/pentacene/source (drain) electrode. The thickness of n-type semiconductor layer is 1˜200 nm. The induced electrons at the interface of n-type semiconductor and polymer electret lead to the reduction of the height of the hole-barrier formed at the interface of polymer and pentacene, thus effectively reducing the programming/erasing (P/E) gate voltages of pentacene OFET, adjusting the height of hole barrier at the interface of polymer and pentacene to a reasonable scope by controlling the quantity of induced electrons in n-type semiconductor layer, thus improving the performance of pentacene OFET, such as the P/E speeds, P/E endurance and retention characteristics.
2D CHANNEL WITH SELF-ALIGNED SOURCE/DRAIN
An integrated circuit includes a two-dimensional transistor having a channel region having lateral ends in contact with first and second source/drain regions. The transistor includes a gate dielectric that is aligned with the lateral ends of the channel region. The transistor includes a gate metal on the gate dielectric. The gate metal has a relatively small lateral overlap of the first and second source/drain regions.
Packing material, method for producing packing material, reading device, stored-article management system, disconnection detection device, unsealing detection label, and unsealing detection system
A package in an aspect of the present invention includes: a package body having a receiving cavity for receiving a cavity item; a sheet for sealing the receiving cavity; a conducting wire formed on the sheet so as to pass above the sealed opening portion of the receiving cavity; and a wireless communication device formed on the sheet so as to be connected to the conducting wire. The wireless communication device transmits a signal including information which differs between before and after the conducting wire together with the sheet is cut as a result of opening the receiving cavity. The information transmitted from the wireless communication device is read by a reader. The package and the reader are used for a cavity item management system.