H01L21/0274

Cost effective precision resistor using blocked DEPOP method in self-aligned gate endcap (SAGE) architecture

A method for fabricating a semiconductor structure includes forming a plurality of semiconductor fins protruding through a trench isolation region above a substrate. A first gate structure is formed over a first of the plurality of semiconductor fins. A second gate structure is formed over a second of the plurality of semiconductor fins. A gate edge isolation structure is formed laterally between and in contact with the first gate structure and the second gate structure, the gate edge isolation structure on the trench isolation region and extending above an uppermost surface of the first gate structure and the second gate structure. A precision resistor is formed on the gate edge isolation structure, wherein the precision resistor and the first gate structure and second gate structure comprise a same material layer.

HEAT TREATMENT DEVICE AND TREATMENT METHOD
20230020235 · 2023-01-19 ·

A heat treatment device includes: a heating plate configured to support and heat a substrate on which a resist film is formed; a chamber configured to cover a processing space above the heating plate; a gas supply configured to supply a gas into the chamber along a gas flow path connected to an inside of the chamber, the gas flow path beginning from an outer periphery of the heating plate and extending along an upper surface of the heating toward an end portion on an outer periphery of the substrate; and an exhaust port configured to evacuate inside of the chamber through exhaust holes that are formed above the processing space and open downwards.

IMPRINT APPARATUS, IMPRINT METHOD, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

According to one embodiment, an imprint apparatus that presses a fine pattern of an original plate against a photo-curable resin dropped onto a substrate, and transfers the fine pattern to the photo-curable resin by applying light, includes a dropping unit that drops the photo-curable resin onto a shot region obtained by dividing the substrate into a plurality of sections, an original plate supporting unit that stamps the original plate on the photo-curable resin on the substrate, the original plate being supported the fine pattern towards the substrate side, and a substrate supporting unit that supports the substrate and moves the substrate such that a position of a predetermined shot region of the substrate is a dropping position of the dropping unit or a stamping position of the original plate, in which the dropping unit is controlled such that the photo-curable resin is sequentially dropped onto the plurality of shot regions of the substrate, and the original plate supporting unit is controlled such that the fine pattern is transferred by sequentially stamping the original plate on the photo-curable resin dropped onto the plurality of shot regions, while operating the substrate supporting unit.

METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY
20230013786 · 2023-01-19 ·

The present application provides a method for manufacturing a semiconductor structure, a semiconductor structure, and a memory. The method for manufacturing a semiconductor structure includes the following steps: providing a substrate, and forming a stabilizing layer on the substrate; forming a stabilizing structure consisting of a plurality of linear structures and grooves among the linear structures; forming a hard mask layer covering the stabilizing structure; forming a mask pattern connected to a top of the linear structure and an inner wall of the groove on the hard mask layer; and transferring the mask pattern to the substrate.

HUMIDITY CONTROL OR AQUEOUS TREATMENT FOR EUV METALLIC RESIST
20230012705 · 2023-01-19 ·

A method for forming a semiconductor device is provided. The method includes applying a photoresist composition over a substrate, thereby forming a photoresist layer over the substrate; performing a first baking process to the photoresist layer; exposing the photoresist layer to an extreme ultraviolet (EUV) radiation, thereby forming a pattern therein; performing a second baking process to the photoresist layer; and developing the photoresist layer having the pattern therein using a developer, thereby forming a patterned photoresist layer. The first baking process and the second baking process are conducted under an ambient atmosphere having a humidity level ranging from 55% to 100%.

COMPOSITION FOR SEMICONDUCTOR PHOTORESIST, AND PATTERN FORMATION METHOD USING SAME

Disclosed are a semiconductor photoresist composition and a method of forming patterns using the semiconductor photoresist composition. The semiconductor photoresist composition includes an organometallic compound represented by Chemical Formula 1 and a solvent and a method of forming patterns using the same.

Substrate hydrophilizing agent
11698588 · 2023-07-11 · ·

Provided is a substrate hydrophilizing agent that improves the wettability of a substrate surface with respect to a photoresist. A substrate hydrophilizing agent of the present invention is an agent for hydrophilizing a surface of a substrate on which a pattern is formed through photolithography, and contains at least the following Component (A) and Component (B). Component (A): a water-soluble oligomer having a weight average molecular weight from 100 to less than 10000. Component (B): water. The water-soluble oligomer of Component (A) is preferably a compound represented by the following Formula (a-1):
R.sup.a1O—(C.sub.3H.sub.6O.sub.2).sub.n—H  (a-1)
(where R.sup.a1 represents a hydrogen atom, a hydrocarbon group which may have a hydroxyl group, or an acyl group; and n is an integer from 2 to 60.)

Multi-Layer Random Access Memory and Methods of Manufacture
20230217643 · 2023-07-06 ·

A semiconductor structure for a DRAM is described having multiple layers of arrays of memory cells. Memory cells in a vertical string extending through the layers have an electrical connection to one terminal of the memory cells in that string. Word lines couple the strings together. Each layer of the array also includes bit line connections to memory cells on that layer. Select transistors enable the use of folded bit lines. The memory cells preferably are thyristors. Methods of fabricating the array are described.

MANUFACTURING METHOD FOR CURED SUBSTANCE, MANUFACTURING METHOD FOR LAMINATE, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE

A manufacturing method for a cured substance includes a film forming step of applying a specific photosensitive resin composition onto a base material to form a film, an exposure step of selectively exposing the film, a development step of developing the exposed film with a developer to form a pattern, a treatment step of bringing a treatment liquid into contact with the pattern, and a heating step of heating the pattern after the treatment step, in which at least one of the developer or the treatment liquid contains at least one compound selected from the group consisting of a base and a base generator.

Dose reduction of patterned metal oxide photoresists

Embodiments of the present disclosure generally relate to a multilayer stack used as a mask in extreme ultraviolet (EUV) lithography and methods for forming a multilayer stack. In one embodiment, the method includes forming a carbon layer over a film stack, forming a metal rich oxide layer on the carbon layer by a physical vapor deposition (PVD) process, forming a metal oxide photoresist layer on the metal rich oxide layer, and patterning the metal oxide photoresist layer. The metal oxide photoresist layer is different from the metal rich oxide layer and is formed by a process different from the PVD process. The metal rich oxide layer formed by the PVD process improves adhesion of the metal oxide photoresist layer and increases the secondary electrons during EUV lithography, which leads to decreased EUV dose energies.