A method includes forming a fin structure including a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over a substrate. A dummy gate structure is formed across the fin structure. The exposed second portions of the fin structure are removed. A selective etching process is performed, using a gas mixture including a hydrogen-containing gas and a fluorine-containing gas, to laterally recess the first semiconductor layers. Inner spacers are formed on opposite end surfaces of the laterally recessed first semiconductor layers. Source/drain epitaxial structures are formed on opposite end surfaces of the second semiconductor layers. The dummy gate structure is removed to expose the first portion of the fin structure. The laterally recessed first semiconductor layers are removed. A gate structure is formed to surround each of the second semiconductor layers.

Methods, apparatuses, and systems for substrate processing for lowering contact resistance in at least contact pads of a semiconductor device are provided herein. In some embodiments, a method of substrate processing for lowering contact resistance of contact pads includes: circulating a cooling fluid in at least one channel of a pedestal; and exposing a backside of the substrate located on the pedestal to a cooling gas to cool a substrate located on the pedestal to a temperature of less than 70 degrees Celsius. In some embodiments in accordance with the present principles, the method can further include distributing a hydrogen gas or hydrogen gas combination over the substrate.

A method includes forming a first high-k dielectric layer over a first semiconductor region, forming a second high-k dielectric layer over a second semiconductor region, forming a first metal layer comprising a first portion over the first high-k dielectric layer and a second portion over the second high-k dielectric layer, forming an etching mask over the second portion of the first metal layer, and etching the first portion of the first metal layer. The etching mask protects the second portion of the first metal layer. The etching mask is ashed using meta stable plasma. A second metal layer is then formed over the first high-k dielectric layer.

In an embodiment, a device includes a substrate, a first semiconductor layer that extends from the substrate, and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer includes silicon and the second semiconductor layer includes silicon germanium, with edge portions of the second semiconductor layer having a first germanium concentration, a center portion of the second semiconductor layer having a second germanium concentration, and the second germanium concentration being less than the first germanium concentration. The device also includes a gate stack on the second semiconductor layer, lightly doped source/drain regions in the second semiconductor layer, and source and drain regions extending into the lightly doped source/drain regions.

A laser system includes a nonlinear optical (NLO) crystal, wherein the NLO crystal is annealed within a selected temperature range. The NLO crystal is passivated with at least one of hydrogen, deuterium, a hydrogen-containing compound or a deuterium-containing compound to a selected passivation level. The system further includes at least one light source, wherein at least one light source is configured to generate light of a selected wavelength and at least one light source is configured to transmit light through the NLO crystal. The system further includes a crystal housing unit configured to house the NLO crystal.

An epitaxial wafer that includes a silicon wafer and an epitaxial layer on the silicon wafer. The silicon wafer contains hydrogen that has a concentration profile including a first peak and a second peak. A hydrogen peak concentration of the first peak and a hydrogen peak concentration of the second peak are each not less than 1×10.sup.17 atoms/cm.sup.3.

A method of manufacturing a semiconductor device includes accommodating a substrate in a process chamber; supplying a first gas containing oxygen into the process chamber; generating plasma in the process chamber by exciting the first gas; supplying a second gas containing hydrogen into the process chamber and adjusting a hydrogen concentration distribution in the process chamber according to a density distribution of the plasma in the process chamber; and processing the substrate with oxidizing species generated by the plasma.

A manufacturing method of a thin film transistor is provided, which has advantages that there are sufficient hydrogen ions in an interlayer dielectric layer. In an annealing treatment, an amount of the hydrogen ions diffused into an active layer is sufficient, and the hydrogen ions enter a channel of the thin film transistor to fill non-bonded or unsaturated bonds of polysilicon atoms, thereby filling defects in the channel, repairing the defects of the active layer, reducing the number of unsteady states, and improving mobility and threshold voltage uniformity.

Systems and methods for thermal treatment of a workpiece are provided. In one example, a method for conducting a treatment process on a workpiece, such as a thermal treatment process, an annealing treatment process, an oxidizing treatment process, or a reducing treatment process in a processing apparatus is provided. The processing apparatus includes a plasma chamber and a processing chamber. The plasma chamber and the processing chamber are separated by a plurality of separation grids or grid plates. The separation grids or grid plates operable to filter ions generated in the plasma chamber. The processing chamber has a workpiece support operable to support a workpiece.

A method of manufacturing a semiconductor device includes forming a stack in which first material layers and second material layers are alternately stacked, forming a channel structure passing through the stack, forming openings by removing the first material layers, forming an amorphous blocking layer in the openings, and performing a first heat treatment process to supply deuterium through the openings and substitute hydrogen in the channel structure with the deuterium.