Patent classifications
H01L21/302
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Method for manufacturing a semiconductor device includes: forming a first area and a second area of a peripheral area on a substrate; forming a first lamination structure in the first area, and forming a second lamination structure in an array area and the second area; performing thermal treatment on the substrate so that atoms in a work function layer are diffused into a second dielectric layer, and an interface interaction occurs between the second dielectric layer and a first dielectric layer; removing the first lamination structure to the second dielectric layer, and removing the second lamination structure to the second dielectric layer; forming a fourth barrier layer and a second conductive layer, a content ratio of metallic element to non-metallic element in a first barrier layer being less than a content ratio of metallic element to non-metallic element in a second barrier layer and a third barrier layer.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Method for manufacturing a semiconductor device includes: forming a first area and a second area of a peripheral area on a substrate; forming a first lamination structure in the first area, and forming a second lamination structure in an array area and the second area; performing thermal treatment on the substrate so that atoms in a work function layer are diffused into a second dielectric layer, and an interface interaction occurs between the second dielectric layer and a first dielectric layer; removing the first lamination structure to the second dielectric layer, and removing the second lamination structure to the second dielectric layer; forming a fourth barrier layer and a second conductive layer, a content ratio of metallic element to non-metallic element in a first barrier layer being less than a content ratio of metallic element to non-metallic element in a second barrier layer and a third barrier layer.
Substrate processing method
A substrate processing device includes a processing tank, a substrate holding unit, a fluid supply unit, and a control unit. The processing tank stores a processing liquid for processing a substrate. The substrate holding unit holds the substrate in the processing liquid in the processing tank. The fluid supply unit supplies a fluid to the processing tank. The control unit controls the fluid supply unit. The control unit controls the fluid supply unit such that the fluid supply unit changes supply of the fluid during a period from a start of supply of the fluid to the processing tank storing the processing liquid in which the substrate is immersed to an end of supply of the fluid to the processing tank storing the processing liquid in which the substrate is immersed.
Substrate processing method
A substrate processing device includes a processing tank, a substrate holding unit, a fluid supply unit, and a control unit. The processing tank stores a processing liquid for processing a substrate. The substrate holding unit holds the substrate in the processing liquid in the processing tank. The fluid supply unit supplies a fluid to the processing tank. The control unit controls the fluid supply unit. The control unit controls the fluid supply unit such that the fluid supply unit changes supply of the fluid during a period from a start of supply of the fluid to the processing tank storing the processing liquid in which the substrate is immersed to an end of supply of the fluid to the processing tank storing the processing liquid in which the substrate is immersed.
METHOD OF ADJUSTING WAFER SHAPE USING MULTI-DIRECTIONAL ACTUATION FILMS
Techniques herein include methods for coating a single layer actuator film or multi-layer actuator film on the backside of a wafer. The actuator film includes one or more chemical actuators. Chemical actuators are various molecules, crystals, chemical compounds and other chemical compositions that are capable of imposing directional stress in response to application of an external stimulus on the chemical actuator. The external stimulus can include a particular wavelength of light or polarization of light, or heat (or directed infrared radiation) or load, which can include load-responsive actuation or pressure-responsive actuation.
Pore formation in a substrate
Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays thereof. In one aspect, methods for manufacturing nanopores and arrays thereof exploit a physical seam. One or more etch pits are formed in a topside of a substrate and one or more trenches, which align with the one or more etch pits, are formed in a backside of the substrate. An opening is formed between the one or more etch pits and the one or more trenches. A dielectric material is then formed over the substrate to fill the opening. Contacts are then disposed on the topside and the backside of the substrate and a voltage is applied from the topside to the backside, or vice versa, through the dielectric material to form a nanopore. In another aspect, the nanopore is formed at or near the center of the opening at a seam, which is formed in the dielectric material.
Surface protectant for semiconductor wafer
Provided is a surface protectant that suppresses corrosion of a semiconductor wafer surface by a basic compound, and reduces defects in the semiconductor wafer. The semiconductor wafer surface protectant of the present invention includes a compound represented by Formula (1) below;
R.sup.1O—(C.sub.3H.sub.6O.sub.2).sub.n—H (1) where R.sup.1 denotes a hydrogen atom, a hydrocarbon group that has from 1 to 24 carbon atoms and may have a hydroxyl group, or a group represented by R.sup.2CO, where the R.sup.2 denotes a hydrocarbon group having from 1 to 24 carbon atoms; and n indicates an average degree of polymerization of a glycerin unit shown in the parentheses, and is from 2 to 60.
Surface protectant for semiconductor wafer
Provided is a surface protectant that suppresses corrosion of a semiconductor wafer surface by a basic compound, and reduces defects in the semiconductor wafer. The semiconductor wafer surface protectant of the present invention includes a compound represented by Formula (1) below;
R.sup.1O—(C.sub.3H.sub.6O.sub.2).sub.n—H (1) where R.sup.1 denotes a hydrogen atom, a hydrocarbon group that has from 1 to 24 carbon atoms and may have a hydroxyl group, or a group represented by R.sup.2CO, where the R.sup.2 denotes a hydrocarbon group having from 1 to 24 carbon atoms; and n indicates an average degree of polymerization of a glycerin unit shown in the parentheses, and is from 2 to 60.
Processing method of workpiece with laser power adjustment based on thickness measurement and processing apparatus thereof
A processing method of a workpiece used when the workpiece is processed is provided. The processing method of a workpiece includes a disposing step of disposing the workpiece in a gas containing a substance that generates an active species that reacts with the workpiece, a measurement step of measuring the distribution of the thickness of the workpiece disposed in the gas, and a laser beam irradiation step of irradiating the workpiece in the gas with a laser beam of which the power is adjusted based on the distribution of the thickness measured in the measurement step. In the laser beam irradiation step, the removal amount by which a region irradiated with the laser beam in the workpiece is removed by the active species is controlled by irradiating the workpiece with the laser beam of which the power is adjusted.
WARPAGE-REDUCING SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD OF THE SAME
A warpage-reducing semiconductor structure includes a wafer. The wafer includes a front side and a back side. Numerous semiconductor elements are disposed at the front side. A silicon oxide layer is disposed at the back side. A UV-transparent silicon nitride layer covers and contacts the silicon oxide layer. The refractive index of the UV-transparent silicon nitride layer is between 1.55 and 2.10.