In a gate last metal gate process for forming a transistor, a dielectric layer is formed over an intermediate transistor structure, the intermediate structure including a dummy gate electrode, typically formed of polysilicon. Various processes, such as patterning the polysilicon, planarizing top layers of the structure, and the like can remove top portions of the dielectric layer, which can result in decreased control of gate height when a metal gate is formed in place of the dummy gate electrode, decreased control of fin height for finFETs, and the like. Increasing the resistance of the dielectric layer to attack from these processes, such as by implanting silicon or the like into the dielectric layer before such other processes are performed, results in less removal of the top surface, and hence improved control of the resulting structure dimensions and performance.

A method may include forming in a substrate a first array of a first material of first linear structures, interspersed with a second array of a second material, of second linear structures, the first and second linear structures elongated along a first axis. The method may include generating a chop pattern in the first layer, comprising a third linear array, interspersed with a fourth linear array. The third and fourth linear arrays may be elongated along a second axis, forming a non-zero angle of incidence with respect to the first axis. The third linear array may include alternating portions of the first and second material, while the fourth linear array comprises an array of cavities, arranged within the patterning layer. The method may include elongating a first set of cavities along the first axis, to form a first set of elongated cavities bounded by the first material.

A cleaning method that removes contaminants adhering to a stage in a chamber, includes: setting a pressure in a chamber to a predetermined vacuum pressure; supplying a first gas that forms a shock wave toward the stage; and supplying a second gas that does not form the shock wave toward the stage.

What is provided is a transistor including a gate electrode, a gate insulating film, a semiconductor film, a source electrode, and a drain electrode, in which the gate insulating film is a laminated film in which a SiO.sub.x film and a SiC.sub.yN.sub.z film are alternately formed, the total number of films constituting the laminated film is 3 or more and 18 or less, and the thickness of each film constituting the laminated film is 25 nm or more and 150 nm or less.

Methods and precursors for selectively depositing a metal film on a silicon nitride surface relative to a silicon oxide surface are described. The substrate comprising both surfaces is exposed to a blocking compound to selectively block the silicon oxide surface. A metal film is then selectively deposited on the silicon nitride surface.

A process for preparing a support comprises the placing of a substrate on a susceptor in a chamber of a deposition system, the susceptor having an exposed surface not covered by the substrate; the flowing of a precursor containing carbon in the chamber at a deposition temperature so as to form at least one layer on an exposed face of the substrate, while at the same time depositing species of carbon and of silicon on the exposed surface of the susceptor. The process also comprises, directly after the removal of the substrate from the chamber, a first etch step consisting of the flowing of an etch gas in the chamber at a first etching temperature not higher than the deposition temperature so as to eliminate at least some of the species of carbon and silicon deposited on the susceptor.

A vapor phase epitaxial growth device comprises a reactor vessel and a wafer holder arranged within the reactor vessel. The wafer holder includes a wafer holding surface configured to hold a wafer with a wafer surface oriented substantially vertically downward. The device comprises a first material gas supply pipe configured to supply a first material gas and arranged below the wafer holding surface. The device comprises a second material gas supply pipe configured to supply a second material gas and arranged below the wafer holding surface. The device comprises a gas exhaust pipe configured to exhaust gases and arranged below the wafer holding surface. A distance between the gas exhaust pipe and an axis line passing through a center of the wafer holding surface is greater than distances between the axis line and each of the first material gas supply pipe and the second material gas supply pipe.

The present invention provides an energy-efficient method and apparatus that can achieve exhaust gas abatement with a minimum use of diluent nitrogen gas. More specifically, the present invention is directed to a method and apparatus for exhaust gas abatement under reduced pressure, in which an exhaust gas supplied from an exhaust gas source via a vacuum pump is decomposed by heat of a high-temperature plasma under a reduced pressure.

A valve device is capable of precisely adjusting a flow rate variation due to aging, aging, etc. without using an external sensor. An adjusting actuator includes a piezoelectric element for adjusting the position of the operating member positioned at the open position, and the drive circuit of the adjusting actuator includes a detecting unit for detecting an electric signal related to the amount of strain generated in the piezoelectric element, and a control unit for controlling the adjusting actuator so that the opening degree of the flow path by the valve element becomes the target opening degree based on the electric signal related to the amount of strain of the piezoelectric element.

A plasma processing device includes: a plurality of processing chambers; a junction exhaust pipe into which a plurality of exhaust flow paths for evacuating interiors of the plurality of processing chambers joins; and a plurality of branch exhaust pipes disposed between the plurality of exhaust flow paths and the junction exhaust pipe and connecting the junction exhaust pipe to the plurality of exhaust flow paths, respectively, wherein each of the plurality of branch exhaust pipes includes a mechanism, which is disposed in a flow path of the branch exhaust pipe, to deactivate energy of hot electrons flowing through the flow path.