Patent classifications
H01L21/4807
METHOD FOR FILLING VIA HOLE OF CERAMIC SUBSTRATE AND CERAMIC SUBSTRATE VIA HOLE FILLER FORMED THEREBY
The present invention relates to a method for filling a via hole in a ceramic substrate and a filler for the via hole in the ceramic substrate filled using the same. The via hole is formed in a ceramic base material, and a conductor is formed in the via hole, melted in a vacuum state, and cooled, so that the via hole in the ceramic substrate is simply filled with the conductor without any voids. Accordingly, the manufacturing process of the ceramic substrate is simplified, manufacturing costs are reduced, the operational reliability of the ceramic substrate is improved, and stable operational reliability is secured when the ceramic substrate is used in a high-power semiconductor module.
MULTILAYER INTERCONNECTION SUBSTRATE FOR HIGH FREQUENCY AND MANUFACTURING METHOD THEREOF
[Problem] To realize high reliability and high functionalization while suppressing characteristics variation in a multilayer interconnection substrate used in a microwave or millimeter-wave band integrated with an antenna. [Resolution Means] A multilayer substrate for high frequency with an antenna element formed on a surface. The multilayer substrate for high frequency has an intermediate substrate. The intermediate substrate consists of a low-temperature co-fired glass-ceramic substrate and has intermediate insulating layers consisting of a glass-ceramic and an internal conductor formed between these intermediate insulating layers. A surface insulating layer consisting of an organic material having a dielectric constant lower than a glass-ceramic material is stacked on a surface of the intermediate substrate. An outer-side via conductor penetrating this surface insulating layer is configured by a sintered metal that forms a metallic bond with a wiring conductor in the substrate. The outer-side via conductor is formed at the same time as sintering the glass-ceramic multilayer substrate.
ALUMINUM-CERAMIC BONDED SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
There is provided an aluminum-ceramic bonded substrate in which an aluminum plate comprising aluminum alloy is directly bonded to one surface of a ceramic substrate and an aluminum base plate comprising aluminum alloy is directly bonded to the other surface of the ceramic substrate, wherein the aluminum alloy is the aluminum alloy containing 0.05% by mass or more and 3.0% by mass or less of at least one element selected from nickel and iron in total amount, containing 0.01% by mass or more and 0.1% by mass or less of at least one element selected from titanium and zirconium in total amount, and containing 0% by mass or more and 0.05% by mass or less of at least one element selected from boron or carbon in total amount, with a balance being aluminum.
CAVITY WALL STRUCTURE FOR SEMICONDUCTOR PACKAGING
An improved method for forming a semiconductor package is disclosed herein. The method includes forming a multi-layer package substrate having a first major surface and a second major surface opposite to the first major surface. The package substrate comprises a recess region. A semiconductor die is attached to the die region within the recess region. A dam structure is formed within the recess region. The dam structure surrounds the semiconductor die and extends upward to a height below the first major surface of the package substrate. A liquid encapsulant material is dispensed into the recess region. The liquid encapsulant material is surrounded by the dam structure. The liquid encapsulant extends upwardly to a height below the height of the dam structure. A package lid is attached to the package substrate.
MONOLITHIC CERAMIC GAS DISTRIBUTION PLATE
A monolithic ceramic gas distribution plate for use in a process chamber wherein semiconductor substrates can be processed includes a monolithic ceramic body having an upper surface, a lower surface, and an outer cylindrical surface extending between the upper surface and the lower surface. The lower surface includes first gas outlets at uniformly spaced apart first locations and the first gas outlets are in fluid communication with first gas inlets in the upper surface by a first set of vertically extending through holes connecting the first gas inlets with the first gas outlets. The lower surface also includes second gas outlets at uniformly spaced second locations adjacent the first locations and the second gas outlets are in fluid communication with an inner plenum in the monolithic ceramic body by a second set of vertically extending through holes connecting the second gas outlets with the inner plenum. The inner plenum is in in fluid communication with a second gas inlet located in a central portion of the upper surface and the inner plenum is defined by an inner upper wall, an inner lower wall, an inner outer wall, and a set of pillars extending between the inner upper wall and the inner lower wall. Each through hole of the first set of vertically extending through holes passes through a respective one of the pillars to isolate the first and second gases.
Vertical semiconductor diode manufactured with an engineered substrate
A semiconductor diode includes an engineered substrate including a substantially single crystal layer, a buffer layer coupled to the substantially single crystal layer, and a semi-insulating layer coupled to the buffer layer. The semiconductor diode also includes a first N-type gallium nitride layer coupled to the semi-insulating layer and a second N-type gallium nitride layer coupled to the first N-type gallium nitride layer. The first N-type gallium nitride layer has a first doping concentration and the second N-type gallium nitride layer has a second doping concentration less than the first doping concentration. The semiconductor diode further includes a P-type gallium nitride layer coupled to the second N-type gallium nitride layer, an anode contact coupled to the P-type gallium nitride layer, and a cathode contact coupled to a portion of the first N-type gallium nitride layer.
METHOD FOR PRODUCING A METAL-CERAMIC SUBSTRATE WITH PICOLASER
One aspect relates to a method of processing metallized ceramic substrates and to a metal-ceramic substrate obtained by this method.
SILICON NITRIDE CIRCUIT BOARD AND ELECTRONIC COMPONENT MODULE USING THE SAME
The present invention provides a silicon nitride circuit board in which metal plates are attached on front and rear sides of a silicon nitride substrate having a three-point flexural strength of 500 MPa or higher, wherein assuming that a thickness of the metal plate on the front side is denoted by t1, and a thickness of the metal plate on the rear side is denoted by t2, a numerical relation: |t1t2|0.30 mm is satisfied, and a warp is formed in the silicon nitride substrate so that the silicon nitride substrate is convex toward the metal plate on one of the front side or the rear side; and warp amounts of the silicon nitride substrate in a long-side direction and a short-side direction both fall within a range from 0.01 to 1.0 mm. It is preferable that a longitudinal width (L1) of the silicon nitride substrate falls within a range from 10 to 200 mm, and a transverse width (L2) of the silicon nitride substrate falls within a range from 10 to 200 mm. Due to above structure, even if the silicon nitride circuit board has a large difference in thickness between the metal plates attached on front and rear sides of the silicon nitride substrate, TCT properties can be greatly improved.
Molded package with chip carrier comprising brazed electrically conductive layers
A method of manufacturing a package, wherein the method comprises a forming a chip carrier by covering a thermally conductive and electrically insulating core on both opposing main surfaces thereof at least partially by a respective electrically conductive layer by brazing the respective electrically conductive layer on a respective one of the main surfaces; a mounting at least one electronic chip on the chip carrier; an electrically coupling an electrically conductive contact structure with the at least one electronic chip; and an encapsulating part of the electrically conductive contact structure, and at least part of the chip carrier and of the at least one electronic chip by a mold-type encapsulant.
Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor chip, an insulated circuit board including a metal plate, an insulating plate and a circuit pattern, each of which has a rectangular shape, and a spacer part disposed on the periphery of a rear surface of the metal plate including at least one of the four corners thereof. The spacer part protrudes from a rear surface of the metal plate in the thickness direction away from a front surface of the insulated circuit board.