Provided are anisotropic conductive materials, electronic devices including anisotropic conductive materials, and/or methods of manufacturing the electronic devices. An anisotropic conductive material may include a plurality of particles in a matrix material layer. At least some of the particles may include a core portion and a shell portion covering the core portion. The core portion may include a conductive material that is in a liquid state at a temperature greater than 15 C. and less than or equal to about 110 C. or less. For example, the core portion may include at least one of a liquid metal, a low melting point solder, and a nanofiller. The shell portion may include an insulating material. A bonding portion formed by using the anisotropic conductive material may include the core portion outflowed from the particle and may further include an intermetallic compound.

A method of an aspect includes forming a directed self assembly alignment promotion layer over a surface of a substrate having a first patterned region and a second patterned region. A first directed self assembly alignment promotion material is formed selectively over the first patterned region without using lithographic patterning. The method also includes forming an assembled layer over the directed self assembly alignment promotion layer by directed self assembly. A plurality of assembled structures are formed that each include predominantly a first type of polymer over the first directed self assembly alignment promotion material. The assembled structures are each adjacently surrounded by predominantly a second different type of polymer over the second patterned region. The first directed self assembly alignment promotion material has a greater chemical affinity for the first type of polymer than for the second different type of polymer.

An integrated circuit includes a first conductive line on a first metal level of the integrated circuit. The integrated circuit further includes a second conductive line on a second metal level of the integrated circuit. The integrated circuit further includes a slot via electrically connecting the first conductive line with the second conductive line. The slot via overlaps with the first conductive line and the second conductive line. The slot via extends beyond a periphery of at least one of the first conductive line or the second conductive line.

Embodiments of the present disclosure are directed toward formation of solder and copper interconnect structures and associated techniques and configurations. In one embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a solderable material on the IC substrate using an ink deposition process, a binder printing system, or a powder laser sintering system. In another embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a copper powder on the IC substrate using an additive process to form a copper interconnect structure. Other embodiments may be described and/or claimed.