An array substrate has a plurality of sub-pixel regions. The array substrate includes: a substrate; a first transistor and a second transistor that are disposed on a side of the substrate and located in each sub-pixel region; and a first pixel electrode and a second pixel electrode that are disposed on the side of the substrate and located in the sub-pixel region. The first pixel electrode and the second pixel electrode are insulated from each other; the first pixel electrode is electrically connected to the first transistor, and the second pixel electrode is electrically connected to the second transistor.

A thin film transistor array substrate and a display device are provided. The thin film transistor array substrate includes a first semiconductor layer, a second semiconductor layer, a first gate electrode, a conductive layer, a second gate electrode, a third gate electrode, and an intermediate insulating layer. The first semiconductor layer and the second semiconductor layer are made of different semiconductor materials. The first gate electrode and the conductive layer overlap with the first semiconductor layer. The second gate electrode and the third gate electrode overlap with the second semiconductor layer. The intermediate insulating layer is disposed between the second semiconductor layer and the second gate electrode.

A photomask, a method of manufacturing an array substrate, and a display panel are provided. The photomask includes a photomask line of a first conductive portion, a photomask line of a second conductive portion spaced apart from the photomask line of the first conductive portion, and a bridging line. Two opposite ends of the bridging line are respectively connected to the photomask line of the first conductive portion and the photomask line of the second conductive portion, and a width of the bridging line is less than a preset width.

The present disclosure discloses a display panel, a method for manufacturing a display panel, and a display device, and belongs to the field of liquid crystal display technologies. The display panel includes an array substrate, a counter substrate, and a liquid crystal layer between the array substrate and the counter substrate. For the array substrate, a diffuse reflection layer is sequentially laminated on the array substrate. The array substrate includes a first base substrate, and a thin film transistor array, a diffuse reflection layer, and a first planarization layer that are laminated on the first base substrate. A surface of the diffuse reflection layer proximal to the first planarization layer is a reflection surface that has a plurality of protrusion structures, the protrusion structures are configured to diffusely reflect light irradiated on the reflection surface. Based on this structure, the first planarization layer may separate the protrusion structure from the liquid crystal layer to prevent the protrusion structure from affecting the driving effect of the liquid crystal layer. In this way, the problem in the related art regarding the poor display effect of the display panel is solved and thus the display effect of the display panel is improved.

An array substrate, a method for manufacturing the same, and a display panel are provided. The array substrate includes a substrate, a first metal layer, a buffer layer, and a semiconductor layer. The first metal layer includes a source electrode, a drain electrode, and a light shielding portion. The semiconductor layer is electrically connected to the source electrode through a first via hole penetrating the buffer layer, and is electrically connected to the drain electrode through a second via hole penetrating the buffer layer. The source electrode, the drain electrode, and the light shielding portion can be formed by a same yellow light process, thereby reducing a number of photomasks and a number of process steps.

An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a first thin film transistor located on the base substrate and including a first active layer; and a second thin film transistor located on the base substrate and including a second active layer; a matrix material of the first active layer is the same as that of the second active layer, and the first active layer and the second active layer satisfy at least one of the following conditions: a carrier mobility of the first active layer is greater than that of the second active layer, and a carrier concentration of the first active layer is greater than that of the second active layer. The array substrate is employed to compensate a difference in threshold voltage caused by a difference in channel width-to-length ratio of different thin film transistors.

An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes a substrate; a thin film transistor layer including a gate electrode, a source electrode, and a drain electrode; and a first anti-reflective layer disposed between the substrate and the thin film transistor layer and disposed corresponding to at least one of the gate electrode, the source electrode, or the drain electrode. Wherein, the first anti-reflective layer includes a peeling prevention layer and an anti-reflective functional layer. The anti-reflective functional layer is disposed on a side of the peeling prevention layer away from the substrate.

An array substrate, a manufacturing method thereof, and a display panel are provided. By disposing first electrodes and second electrodes on top and bottom sides of an active layer, respectively, and disposing a part of each gate electrode among sub-active patterns, the array substrate is formed with vertical-structured thin film transistors. Therefore, a channel resistance can be reduced, and a channel width of the thin film transistors can be reduced, thereby reducing an area of the thin film transistors, reducing impedance of the thin film transistors, and reducing power consumption of the display panel.

An array substrate includes a base substrate, a driving circuit layer, and a functional device layer which are sequentially stacked; the driving circuit layer is provided with first driving circuits, and each first driving circuit at least comprises a driving transistor; and the driving circuit layer comprises a first gate layer, a first gate insulation layer, a semiconductor layer, a second gate insulation layer, a second gate layer, an interlayer dielectric layer, and a source-drain metal layer which are sequentially stacked on one side of the base substrate.

An array substrate, a manufacturing method thereof, and a display panel are provided. The array substrate includes a bending area and a non-bending area, and further includes an inorganic stacked layer disposed on a substrate layer. A recess is formed on the inorganic stacked layer in the bending area. A plurality of first metal lines are disposed in the inorganic stacked layer at two sides of the bending area. A filling layer is filled in the recess. The array substrate further includes a second metal line disposed on the inorganic stacked layer and the filling layer, and the first metal lines at the two sides of the bending area form a lap joint by the second metal line.